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feat: 移植到 BC2C 新板

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bmy
2024-06-05 01:05:23 +08:00
parent 92395b9bb7
commit fc62db026b
13 changed files with 172 additions and 652 deletions
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44
project/src/at32f403a_407_int.c
View File

@@ -1,27 +1,27 @@
/* add user code begin Header */
/**
**************************************************************************
* @file at32f403a_407_int.c
* @brief main interrupt service routines.
**************************************************************************
* Copyright notice & Disclaimer
*
* The software Board Support Package (BSP) that is made available to
* download from Artery official website is the copyrighted work of Artery.
* Artery authorizes customers to use, copy, and distribute the BSP
* software and its related documentation for the purpose of design and
* development in conjunction with Artery microcontrollers. Use of the
* software is governed by this copyright notice and the following disclaimer.
*
* THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES,
* GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS,
* TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR
* STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS,
* INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.
*
**************************************************************************
*/
**************************************************************************
* @file at32f403a_407_int.c
* @brief main interrupt service routines.
**************************************************************************
* Copyright notice & Disclaimer
*
* The software Board Support Package (BSP) that is made available to
* download from Artery official website is the copyrighted work of Artery.
* Artery authorizes customers to use, copy, and distribute the BSP
* software and its related documentation for the purpose of design and
* development in conjunction with Artery microcontrollers. Use of the
* software is governed by this copyright notice and the following disclaimer.
*
* THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES,
* GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS,
* TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR
* STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS,
* INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.
*
**************************************************************************
*/
/* add user code end Header */
/* includes ------------------------------------------------------------------*/

428
project/src/at32f403a_407_wk_config.c
View File

@@ -1,27 +1,27 @@
/* add user code begin Header */
/**
**************************************************************************
* @file at32f403a_407_wk_config.c
* @brief work bench config program
**************************************************************************
* Copyright notice & Disclaimer
*
* The software Board Support Package (BSP) that is made available to
* download from Artery official website is the copyrighted work of Artery.
* Artery authorizes customers to use, copy, and distribute the BSP
* software and its related documentation for the purpose of design and
* development in conjunction with Artery microcontrollers. Use of the
* software is governed by this copyright notice and the following disclaimer.
*
* THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES,
* GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS,
* TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR
* STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS,
* INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.
*
**************************************************************************
*/
**************************************************************************
* @file at32f403a_407_wk_config.c
* @brief work bench config program
**************************************************************************
* Copyright notice & Disclaimer
*
* The software Board Support Package (BSP) that is made available to
* download from Artery official website is the copyrighted work of Artery.
* Artery authorizes customers to use, copy, and distribute the BSP
* software and its related documentation for the purpose of design and
* development in conjunction with Artery microcontrollers. Use of the
* software is governed by this copyright notice and the following disclaimer.
*
* THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES,
* GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS,
* TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR
* STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS,
* INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.
*
**************************************************************************
*/
/* add user code end Header */
#include "at32f403a_407_wk_config.h"
@@ -64,8 +64,8 @@
/**
* @brief system clock config program
* @note the system clock is configured as follow:
* system clock (sclk) = hick / 12 * pll_mult
* system clock source = HICK_VALUE
* system clock (sclk) = hext / 2 * pll_mult
* system clock source = HEXT_VALUE
* - hext = HEXT_VALUE
* - sclk = 240000000
* - ahbdiv = 1
@@ -74,7 +74,7 @@
* - apb1clk = 120000000
* - apb2div = 2
* - apb2clk = 120000000
* - pll_mult = 60
* - pll_mult = 30
* - pll_range = GT72MHZ (greater than 72 mhz)
* @param none
* @retval none
@@ -109,7 +109,10 @@ void wk_system_clock_config(void)
}
/* config pll clock resource */
crm_pll_config(CRM_PLL_SOURCE_HICK, CRM_PLL_MULT_60, CRM_PLL_OUTPUT_RANGE_GT72MHZ);
crm_pll_config(CRM_PLL_SOURCE_HEXT_DIV, CRM_PLL_MULT_30, CRM_PLL_OUTPUT_RANGE_GT72MHZ);
/* config hext division */
crm_hext_clock_div_set(CRM_HEXT_DIV_2);
/* enable pll */
crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
@@ -165,9 +168,6 @@ void wk_periph_clock_config(void)
/* enable gpiob periph clock */
crm_periph_clock_enable(CRM_GPIOB_PERIPH_CLOCK, TRUE);
/* enable gpioc periph clock */
crm_periph_clock_enable(CRM_GPIOC_PERIPH_CLOCK, TRUE);
/* enable gpiod periph clock */
crm_periph_clock_enable(CRM_GPIOD_PERIPH_CLOCK, TRUE);
@@ -177,27 +177,15 @@ void wk_periph_clock_config(void)
/* enable usart1 periph clock */
crm_periph_clock_enable(CRM_USART1_PERIPH_CLOCK, TRUE);
/* enable tmr11 periph clock */
crm_periph_clock_enable(CRM_TMR11_PERIPH_CLOCK, TRUE);
/* enable tmr6 periph clock */
crm_periph_clock_enable(CRM_TMR6_PERIPH_CLOCK, TRUE);
/* enable tmr12 periph clock */
crm_periph_clock_enable(CRM_TMR12_PERIPH_CLOCK, TRUE);
/* enable usart2 periph clock */
crm_periph_clock_enable(CRM_USART2_PERIPH_CLOCK, TRUE);
/* enable usart3 periph clock */
crm_periph_clock_enable(CRM_USART3_PERIPH_CLOCK, TRUE);
/* enable i2c1 periph clock */
crm_periph_clock_enable(CRM_I2C1_PERIPH_CLOCK, TRUE);
/* enable i2c2 periph clock */
crm_periph_clock_enable(CRM_I2C2_PERIPH_CLOCK, TRUE);
/* enable can1 periph clock */
crm_periph_clock_enable(CRM_CAN1_PERIPH_CLOCK, TRUE);
@@ -251,133 +239,21 @@ void wk_gpio_config(void)
/* add user code end gpio_config 1 */
/* gpio input config */
gpio_init_struct.gpio_mode = GPIO_MODE_INPUT;
gpio_init_struct.gpio_pins = GPIO_PINS_4 | GPIO_PINS_5 | GPIO_PINS_6 | GPIO_PINS_7;
gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
gpio_init(GPIOA, &gpio_init_struct);
gpio_init_struct.gpio_mode = GPIO_MODE_INPUT;
gpio_init_struct.gpio_pins = GPIO_PINS_2;
gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
gpio_init(GPIOD, &gpio_init_struct);
gpio_init_struct.gpio_mode = GPIO_MODE_INPUT;
gpio_init_struct.gpio_pins = GPIO_PINS_3 | GPIO_PINS_4 | GPIO_PINS_5;
gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
gpio_init(GPIOB, &gpio_init_struct);
/* gpio output config */
gpio_bits_set(GPIOC, GPIO_PINS_0 | GPIO_PINS_1 | GPIO_PINS_2 | GPIO_PINS_3);
gpio_bits_reset(GPIOB, GPIO_PINS_6 | GPIO_PINS_7);
gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_MODERATE;
gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
gpio_init_struct.gpio_mode = GPIO_MODE_OUTPUT;
gpio_init_struct.gpio_pins = GPIO_PINS_0 | GPIO_PINS_1 | GPIO_PINS_2 | GPIO_PINS_3;
gpio_init_struct.gpio_pins = GPIO_PINS_6 | GPIO_PINS_7;
gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
gpio_init(GPIOC, &gpio_init_struct);
gpio_init(GPIOB, &gpio_init_struct);
/* add user code begin gpio_config 2 */
/* add user code end gpio_config 2 */
}
/**
* @brief init i2c1 function.
* @param none
* @retval none
*/
void wk_i2c1_init(void)
{
/* add user code begin i2c1_init 0 */
/* add user code end i2c1_init 0 */
gpio_init_type gpio_init_struct;
gpio_default_para_init(&gpio_init_struct);
/* add user code begin i2c1_init 1 */
/* add user code end i2c1_init 1 */
/* configure the SCL pin */
gpio_init_struct.gpio_out_type = GPIO_OUTPUT_OPEN_DRAIN;
gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_MODERATE;
gpio_init_struct.gpio_pins = GPIO_PINS_6;
gpio_init(GPIOB, &gpio_init_struct);
/* configure the SDA pin */
gpio_init_struct.gpio_out_type = GPIO_OUTPUT_OPEN_DRAIN;
gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_MODERATE;
gpio_init_struct.gpio_pins = GPIO_PINS_7;
gpio_init(GPIOB, &gpio_init_struct);
i2c_init(I2C1, I2C_FSMODE_DUTY_2_1, 100000);
i2c_own_address1_set(I2C1, I2C_ADDRESS_MODE_7BIT, 0x0);
i2c_ack_enable(I2C1, TRUE);
i2c_clock_stretch_enable(I2C1, TRUE);
i2c_general_call_enable(I2C1, FALSE);
i2c_enable(I2C1, TRUE);
/* add user code begin i2c1_init 2 */
/* add user code end i2c1_init 2 */
}
/**
* @brief init i2c2 function.
* @param none
* @retval none
*/
void wk_i2c2_init(void)
{
/* add user code begin i2c2_init 0 */
/* add user code end i2c2_init 0 */
gpio_init_type gpio_init_struct;
gpio_default_para_init(&gpio_init_struct);
/* add user code begin i2c2_init 1 */
/* add user code end i2c2_init 1 */
/* configure the SCL pin */
gpio_init_struct.gpio_out_type = GPIO_OUTPUT_OPEN_DRAIN;
gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_MODERATE;
gpio_init_struct.gpio_pins = GPIO_PINS_10;
gpio_init(GPIOB, &gpio_init_struct);
/* configure the SDA pin */
gpio_init_struct.gpio_out_type = GPIO_OUTPUT_OPEN_DRAIN;
gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_MODERATE;
gpio_init_struct.gpio_pins = GPIO_PINS_11;
gpio_init(GPIOB, &gpio_init_struct);
i2c_init(I2C2, I2C_FSMODE_DUTY_2_1, 100000);
i2c_own_address1_set(I2C2, I2C_ADDRESS_MODE_7BIT, 0x0);
i2c_ack_enable(I2C2, TRUE);
i2c_clock_stretch_enable(I2C2, TRUE);
i2c_general_call_enable(I2C2, FALSE);
i2c_enable(I2C2, TRUE);
/* add user code begin i2c2_init 2 */
/* add user code end i2c2_init 2 */
}
/**
* @brief init usart1 function
* @param none
@@ -516,7 +392,7 @@ void wk_usart3_init(void)
gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
gpio_init_struct.gpio_pins = GPIO_PINS_10;
gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
gpio_init(GPIOC, &gpio_init_struct);
gpio_init(GPIOB, &gpio_init_struct);
/* configure the RX pin */
gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_MODERATE;
@@ -524,9 +400,7 @@ void wk_usart3_init(void)
gpio_init_struct.gpio_mode = GPIO_MODE_INPUT;
gpio_init_struct.gpio_pins = GPIO_PINS_11;
gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
gpio_init(GPIOC, &gpio_init_struct);
gpio_pin_remap_config(USART3_GMUX_0001, TRUE);
gpio_init(GPIOB, &gpio_init_struct);
/* configure param */
usart_init(USART3, 115200, USART_DATA_8BITS, USART_STOP_1_BIT);
@@ -600,48 +474,11 @@ void wk_tmr8_init(void)
/* add user code end tmr8_init 0 */
gpio_init_type gpio_init_struct;
tmr_output_config_type tmr_output_struct;
tmr_brkdt_config_type tmr_brkdt_struct;
gpio_default_para_init(&gpio_init_struct);
/* add user code begin tmr8_init 1 */
/* add user code end tmr8_init 1 */
/* configure the CH1 pin */
gpio_init_struct.gpio_pins = GPIO_PINS_6;
gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_MODERATE;
gpio_init(GPIOC, &gpio_init_struct);
/* configure the CH2 pin */
gpio_init_struct.gpio_pins = GPIO_PINS_7;
gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_MODERATE;
gpio_init(GPIOC, &gpio_init_struct);
/* configure the CH3 pin */
gpio_init_struct.gpio_pins = GPIO_PINS_8;
gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_MODERATE;
gpio_init(GPIOC, &gpio_init_struct);
/* configure the CH4 pin */
gpio_init_struct.gpio_pins = GPIO_PINS_9;
gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_MODERATE;
gpio_init(GPIOC, &gpio_init_struct);
/* configure counter settings */
tmr_base_init(TMR8, 2399, 1999);
tmr_cnt_dir_set(TMR8, TMR_COUNT_UP);
@@ -653,67 +490,6 @@ void wk_tmr8_init(void)
tmr_sub_sync_mode_set(TMR8, FALSE);
tmr_primary_mode_select(TMR8, TMR_PRIMARY_SEL_RESET);
/* configure channel 1 output settings */
tmr_output_struct.oc_mode = TMR_OUTPUT_CONTROL_OFF;
tmr_output_struct.oc_output_state = TRUE;
tmr_output_struct.occ_output_state = FALSE;
tmr_output_struct.oc_polarity = TMR_OUTPUT_ACTIVE_HIGH;
tmr_output_struct.occ_polarity = TMR_OUTPUT_ACTIVE_HIGH;
tmr_output_struct.oc_idle_state = FALSE;
tmr_output_struct.occ_idle_state = FALSE;
tmr_output_channel_config(TMR8, TMR_SELECT_CHANNEL_1, &tmr_output_struct);
tmr_channel_value_set(TMR8, TMR_SELECT_CHANNEL_1, 0);
tmr_output_channel_buffer_enable(TMR8, TMR_SELECT_CHANNEL_1, FALSE);
/* configure channel 2 output settings */
tmr_output_struct.oc_mode = TMR_OUTPUT_CONTROL_OFF;
tmr_output_struct.oc_output_state = TRUE;
tmr_output_struct.occ_output_state = FALSE;
tmr_output_struct.oc_polarity = TMR_OUTPUT_ACTIVE_HIGH;
tmr_output_struct.occ_polarity = TMR_OUTPUT_ACTIVE_HIGH;
tmr_output_struct.oc_idle_state = FALSE;
tmr_output_struct.occ_idle_state = FALSE;
tmr_output_channel_config(TMR8, TMR_SELECT_CHANNEL_2, &tmr_output_struct);
tmr_channel_value_set(TMR8, TMR_SELECT_CHANNEL_2, 0);
tmr_output_channel_buffer_enable(TMR8, TMR_SELECT_CHANNEL_2, FALSE);
/* configure channel 3 output settings */
tmr_output_struct.oc_mode = TMR_OUTPUT_CONTROL_OFF;
tmr_output_struct.oc_output_state = TRUE;
tmr_output_struct.occ_output_state = FALSE;
tmr_output_struct.oc_polarity = TMR_OUTPUT_ACTIVE_HIGH;
tmr_output_struct.occ_polarity = TMR_OUTPUT_ACTIVE_HIGH;
tmr_output_struct.oc_idle_state = FALSE;
tmr_output_struct.occ_idle_state = FALSE;
tmr_output_channel_config(TMR8, TMR_SELECT_CHANNEL_3, &tmr_output_struct);
tmr_channel_value_set(TMR8, TMR_SELECT_CHANNEL_3, 0);
tmr_output_channel_buffer_enable(TMR8, TMR_SELECT_CHANNEL_3, FALSE);
/* configure channel 4 output settings */
tmr_output_struct.oc_mode = TMR_OUTPUT_CONTROL_OFF;
tmr_output_struct.oc_output_state = TRUE;
tmr_output_struct.occ_output_state = FALSE;
tmr_output_struct.oc_polarity = TMR_OUTPUT_ACTIVE_HIGH;
tmr_output_struct.occ_polarity = TMR_OUTPUT_ACTIVE_HIGH;
tmr_output_struct.oc_idle_state = FALSE;
tmr_output_struct.occ_idle_state = FALSE;
tmr_output_channel_config(TMR8, TMR_SELECT_CHANNEL_4, &tmr_output_struct);
tmr_channel_value_set(TMR8, TMR_SELECT_CHANNEL_4, 0);
tmr_output_channel_buffer_enable(TMR8, TMR_SELECT_CHANNEL_4, FALSE);
/* configure break and dead-time settings */
tmr_brkdt_struct.brk_enable = FALSE;
tmr_brkdt_struct.auto_output_enable = FALSE;
tmr_brkdt_struct.brk_polarity = TMR_BRK_INPUT_ACTIVE_LOW;
tmr_brkdt_struct.fcsoen_state = FALSE;
tmr_brkdt_struct.fcsodis_state = FALSE;
tmr_brkdt_struct.wp_level = TMR_WP_OFF;
tmr_brkdt_struct.deadtime = 0;
tmr_brkdt_config(TMR8, &tmr_brkdt_struct);
tmr_output_enable(TMR8, TRUE);
tmr_counter_enable(TMR8, TRUE);
/* add user code begin tmr8_init 2 */
@@ -721,132 +497,6 @@ void wk_tmr8_init(void)
/* add user code end tmr8_init 2 */
}
/**
* @brief init tmr11 function.
* @param none
* @retval none
*/
void wk_tmr11_init(void)
{
/* add user code begin tmr11_init 0 */
/* add user code end tmr11_init 0 */
gpio_init_type gpio_init_struct;
tmr_output_config_type tmr_output_struct;
gpio_default_para_init(&gpio_init_struct);
/* add user code begin tmr11_init 1 */
/* add user code end tmr11_init 1 */
/* configure the CH1 pin */
gpio_init_struct.gpio_pins = GPIO_PINS_9;
gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_MODERATE;
gpio_init(GPIOB, &gpio_init_struct);
/* configure counter settings */
tmr_base_init(TMR11, 2399, 99);
tmr_cnt_dir_set(TMR11, TMR_COUNT_UP);
tmr_clock_source_div_set(TMR11, TMR_CLOCK_DIV1);
tmr_period_buffer_enable(TMR11, FALSE);
/* configure channel 1 output settings */
tmr_output_struct.oc_mode = TMR_OUTPUT_CONTROL_PWM_MODE_A;
tmr_output_struct.oc_output_state = TRUE;
tmr_output_struct.occ_output_state = FALSE;
tmr_output_struct.oc_polarity = TMR_OUTPUT_ACTIVE_HIGH;
tmr_output_struct.occ_polarity = TMR_OUTPUT_ACTIVE_HIGH;
tmr_output_struct.oc_idle_state = FALSE;
tmr_output_struct.occ_idle_state = FALSE;
tmr_output_channel_config(TMR11, TMR_SELECT_CHANNEL_1, &tmr_output_struct);
tmr_channel_value_set(TMR11, TMR_SELECT_CHANNEL_1, 0);
tmr_output_channel_buffer_enable(TMR11, TMR_SELECT_CHANNEL_1, FALSE);
tmr_output_channel_immediately_set(TMR11, TMR_SELECT_CHANNEL_1, FALSE);
tmr_counter_enable(TMR11, TRUE);
/* add user code begin tmr11_init 2 */
/* add user code end tmr11_init 2 */
}
/**
* @brief init tmr12 function.
* @param none
* @retval none
*/
void wk_tmr12_init(void)
{
/* add user code begin tmr12_init 0 */
/* add user code end tmr12_init 0 */
gpio_init_type gpio_init_struct;
tmr_output_config_type tmr_output_struct;
gpio_default_para_init(&gpio_init_struct);
/* add user code begin tmr12_init 1 */
/* add user code end tmr12_init 1 */
/* configure the CH1 pin */
gpio_init_struct.gpio_pins = GPIO_PINS_14;
gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_MODERATE;
gpio_init(GPIOB, &gpio_init_struct);
/* configure the CH2 pin */
gpio_init_struct.gpio_pins = GPIO_PINS_15;
gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_MODERATE;
gpio_init(GPIOB, &gpio_init_struct);
/* configure counter settings */
tmr_base_init(TMR12, 65535, 0);
tmr_cnt_dir_set(TMR12, TMR_COUNT_UP);
tmr_clock_source_div_set(TMR12, TMR_CLOCK_DIV1);
tmr_period_buffer_enable(TMR12, FALSE);
/* configure channel 1 output settings */
tmr_output_struct.oc_mode = TMR_OUTPUT_CONTROL_OFF;
tmr_output_struct.oc_output_state = TRUE;
tmr_output_struct.occ_output_state = FALSE;
tmr_output_struct.oc_polarity = TMR_OUTPUT_ACTIVE_HIGH;
tmr_output_struct.occ_polarity = TMR_OUTPUT_ACTIVE_HIGH;
tmr_output_struct.oc_idle_state = FALSE;
tmr_output_struct.occ_idle_state = FALSE;
tmr_output_channel_config(TMR12, TMR_SELECT_CHANNEL_1, &tmr_output_struct);
tmr_channel_value_set(TMR12, TMR_SELECT_CHANNEL_1, 0);
tmr_output_channel_buffer_enable(TMR12, TMR_SELECT_CHANNEL_1, FALSE);
/* configure channel 2 output settings */
tmr_output_struct.oc_mode = TMR_OUTPUT_CONTROL_OFF;
tmr_output_struct.oc_output_state = TRUE;
tmr_output_struct.occ_output_state = FALSE;
tmr_output_struct.oc_polarity = TMR_OUTPUT_ACTIVE_HIGH;
tmr_output_struct.occ_polarity = TMR_OUTPUT_ACTIVE_HIGH;
tmr_output_struct.oc_idle_state = FALSE;
tmr_output_struct.occ_idle_state = FALSE;
tmr_output_channel_config(TMR12, TMR_SELECT_CHANNEL_2, &tmr_output_struct);
tmr_channel_value_set(TMR12, TMR_SELECT_CHANNEL_2, 0);
tmr_output_channel_buffer_enable(TMR12, TMR_SELECT_CHANNEL_2, FALSE);
tmr_counter_enable(TMR12, TRUE);
/* add user code begin tmr12_init 2 */
/* add user code end tmr12_init 2 */
}
/**
* @brief init can1 function.
* @param none
@@ -900,9 +550,9 @@ void wk_can1_init(void)
/*can_baudrate_setting-------------------------------------------------------------*/
/*set baudrate = pclk/(baudrate_div *(1 + bts1_size + bts2_size))------------------*/
can_baudrate_struct.baudrate_div = 24; /*value: 1~0xFFF*/
can_baudrate_struct.baudrate_div = 30; /*value: 1~0xFFF*/
can_baudrate_struct.rsaw_size = CAN_RSAW_1TQ; /*value: 1~4*/
can_baudrate_struct.bts1_size = CAN_BTS1_8TQ; /*value: 1~16*/
can_baudrate_struct.bts1_size = CAN_BTS1_6TQ; /*value: 1~16*/
can_baudrate_struct.bts2_size = CAN_BTS2_1TQ; /*value: 1~8*/
can_baudrate_set(CAN1, &can_baudrate_struct);
@@ -989,9 +639,9 @@ void wk_can2_init(void)
/*can_baudrate_setting-------------------------------------------------------------*/
/*set baudrate = pclk/(baudrate_div *(1 + bts1_size + bts2_size))------------------*/
can_baudrate_struct.baudrate_div = 24; /*value: 1~0xFFF*/
can_baudrate_struct.baudrate_div = 30; /*value: 1~0xFFF*/
can_baudrate_struct.rsaw_size = CAN_RSAW_1TQ; /*value: 1~4*/
can_baudrate_struct.bts1_size = CAN_BTS1_8TQ; /*value: 1~16*/
can_baudrate_struct.bts1_size = CAN_BTS1_6TQ; /*value: 1~16*/
can_baudrate_struct.bts2_size = CAN_BTS2_1TQ; /*value: 1~8*/
can_baudrate_set(CAN2, &can_baudrate_struct);

37
project/src/main.c
View File

@@ -69,10 +69,10 @@
/* add user code end 0 */
/**
* @brief main function.
* @param none
* @retval none
*/
* @brief main function.
* @param none
* @retval none
*/
int main(void)
{
/* add user code begin 1 */
@@ -100,24 +100,12 @@ int main(void)
/* init usart3 function. */
wk_usart3_init();
/* init i2c1 function. */
wk_i2c1_init();
/* init i2c2 function. */
wk_i2c2_init();
/* init tmr6 function. */
wk_tmr6_init();
/* init tmr8 function. */
wk_tmr8_init();
/* init tmr11 function. */
wk_tmr11_init();
/* init tmr12 function. */
wk_tmr12_init();
/* init can1 function. */
wk_can1_init();
@@ -141,21 +129,24 @@ int main(void)
LOGD("eeprom init done");
/* motion init */
by_motion_init();
LOGD("motion init done");
// by_motion_init();
// LOGD("motion init done");
/* messy init */
by_messy_init();
LOGD("frame init done");
// by_messy_init();
// LOGD("frame init done");
LOGI("init done");
/* add user code end 2 */
while (1) {
while(1)
{
/* add user code begin 3 */
by_messy_loop();
by_motion_loop();
// by_messy_loop();
// by_motion_loop();
gpio_bits_write(GPIOB, GPIO_PINS_6, !gpio_output_data_bit_read(GPIOB, GPIO_PINS_6));
DWT_Delay(500000);
/* add user code end 3 */
}
}