From fc62db026b7acd2ab797d07381ff5bacaaa67a63 Mon Sep 17 00:00:00 2001 From: bmy <2583236812@qq.com> Date: Wed, 5 Jun 2024 01:05:23 +0800 Subject: [PATCH] =?UTF-8?q?feat:=20=E7=A7=BB=E6=A4=8D=E5=88=B0=20BC2C=20?= =?UTF-8?q?=E6=96=B0=E6=9D=BF?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- .eide/bc2c.arm.options.gcc.json | 29 ++ .eide/bc2c.files.options.yml | 31 ++ .eide/eide.json | 6 +- .vscode/settings.json | 2 +- BC1C.ATWP => BC2C.ATWP | 121 +---- BC1C.code-workspace => BC2C.code-workspace | 2 +- project/MDK_V5/{BC1C.uvoptx => BC2C.uvoptx} | 2 +- project/MDK_V5/{BC1C.uvprojx => BC2C.uvprojx} | 47 +- project/inc/at32f403a_407_conf.h | 4 +- project/inc/at32f403a_407_wk_config.h | 71 --- project/src/at32f403a_407_int.c | 44 +- project/src/at32f403a_407_wk_config.c | 428 ++---------------- project/src/main.c | 37 +- 13 files changed, 172 insertions(+), 652 deletions(-) create mode 100644 .eide/bc2c.arm.options.gcc.json create mode 100644 .eide/bc2c.files.options.yml rename BC1C.ATWP => BC2C.ATWP (50%) rename BC1C.code-workspace => BC2C.code-workspace (91%) rename project/MDK_V5/{BC1C.uvoptx => BC2C.uvoptx} (99%) rename project/MDK_V5/{BC1C.uvprojx => BC2C.uvprojx} (91%) diff --git a/.eide/bc2c.arm.options.gcc.json b/.eide/bc2c.arm.options.gcc.json new file mode 100644 index 0000000..961a577 --- /dev/null +++ b/.eide/bc2c.arm.options.gcc.json @@ -0,0 +1,29 @@ +{ + "version": 5, + "beforeBuildTasks": [], + "afterBuildTasks": [], + "global": { + "$float-abi-type": "softfp", + "output-debug-info": "enable", + "misc-control": "--specs=nosys.specs --specs=nano.specs" + }, + "c/cpp-compiler": { + "language-c": "c11", + "language-cpp": "c++11", + "optimization": "level-debug", + "warnings": "all-warnings", + "one-elf-section-per-function": true, + "one-elf-section-per-data": true, + "C_FLAGS": "", + "CXX_FLAGS": "" + }, + "asm-compiler": { + "ASM_FLAGS": "" + }, + "linker": { + "output-format": "elf", + "remove-unused-input-sections": true, + "LD_FLAGS": "", + "LIB_FLAGS": "-lm" + } +} \ No newline at end of file diff --git a/.eide/bc2c.files.options.yml b/.eide/bc2c.files.options.yml new file mode 100644 index 0000000..2486c4f --- /dev/null +++ b/.eide/bc2c.files.options.yml @@ -0,0 +1,31 @@ +########################################################################################## +# Append Compiler Options For Source Files +# +# syntax: +# : +# +# examples: +# 'main.cpp': --cpp11 -Og ... +# 'src/*.c': -gnu -O2 ... +# 'src/lib/**/*.cpp': --cpp11 -Os ... +# '!Application/*.c': -O0 +# '**/*.c': -O2 -gnu ... +# +# For more syntax, please refer to: https://www.npmjs.com/package/micromatch +# +########################################################################################## + +version: '1.0' + +# +# for source files with filesystem paths +# +files: +# './test/**/*.c': --c99 + +# +# for source files with virtual paths +# +virtualPathFiles: +# 'virtual_folder/**/*.c': --c99 + diff --git a/.eide/eide.json b/.eide/eide.json index 6f73209..1235b45 100644 --- a/.eide/eide.json +++ b/.eide/eide.json @@ -1,5 +1,5 @@ { - "name": "BC1C", + "name": "BC2C", "type": "ARM", "dependenceList": [], "srcDirs": [ @@ -23,7 +23,7 @@ "uid": "4b98bd91695978f42b405679968f1016" }, "targets": { - "BC1C": { + "BC2C": { "excludeList": [ "project/MDK_V5", "libraries/cmsis/cm4/device_support/startup/iar", @@ -33,7 +33,7 @@ "compileConfig": { "cpuType": "Cortex-M4", "floatingPointHardware": "single", - "scatterFilePath": "${workspaceFolder}\\libraries\\cmsis\\cm4\\device_support\\startup\\gcc\\linker\\AT32F403AxC_FLASH.ld", + "scatterFilePath": "${workspaceFolder}\\libraries\\cmsis\\cm4\\device_support\\startup\\gcc\\linker\\AT32F403AxG_FLASH.ld", "useCustomScatterFile": true, "storageLayout": { "RAM": [], diff --git a/.vscode/settings.json b/.vscode/settings.json index 359d6e7..8acd7b9 100644 --- a/.vscode/settings.json +++ b/.vscode/settings.json @@ -1,3 +1,3 @@ { - "sonarlint.pathToCompileCommands": "${workspaceFolder}\\build\\BC1C\\compile_commands.json" + "sonarlint.pathToCompileCommands": "${workspaceFolder}\\build\\BC2C\\compile_commands.json" } \ No newline at end of file diff --git a/BC1C.ATWP b/BC2C.ATWP similarity index 50% rename from BC1C.ATWP rename to BC2C.ATWP index 6dabddf..e79eb76 100644 --- a/BC1C.ATWP +++ b/BC2C.ATWP @@ -2,8 +2,8 @@ AT32F403A - AT32F403ARCT7 - LQFP64 + AT32F403ACGT7 + LQFP48 @@ -11,9 +11,9 @@ - - - + + + @@ -24,9 +24,9 @@ - - - + + + @@ -55,24 +55,6 @@ - - - - - - - - - - - - - - - - - - @@ -84,10 +66,6 @@ - - - - @@ -95,24 +73,6 @@ - - - - - - - - - - - - - - - - - - @@ -130,18 +90,12 @@ 0;0;0 - 0;0;0 0;0;0 0;0;0 0;0;0 1;0;0 0;0;0 0;0;0 - 0;0;0 - 0;0;0 - 0;0;0 - 0;0;0 - 0;0;0 1;1;0 1;1;0 1;1;0 @@ -155,31 +109,13 @@ 0;0;0 0;0;0 - - - - - - - - - - - - - - - - - - 0 - 8.000000 + 16.000000 2 - 0 - 1 - 60 + 1 + 0 + 30 1 1 2 @@ -194,45 +130,24 @@ - - - - - - - - - - + + - - - - - - - - - - - - - - - + + - BC1C - C:/Users/evan/Desktop/BC2024 + BC2C + C:/Users/ForgotDoge/Desktop/BC2024/firmware MDK_V5 true 0x200 diff --git a/BC1C.code-workspace b/BC2C.code-workspace similarity index 91% rename from BC1C.code-workspace rename to BC2C.code-workspace index 8ab9dfc..fe5d546 100644 --- a/BC1C.code-workspace +++ b/BC2C.code-workspace @@ -25,7 +25,7 @@ "editor.tabSize": 4, "editor.autoIndent": "advanced" }, - "EIDE.OpenOCD.ExePath": "C:/toolchains/openocd-arterytek/bin/openocd.exe", + "EIDE.OpenOCD.ExePath": "D:/Program Files (x86)/at32_OpenOCD_V2.0.2/bin/openocd.exe", "workbench.colorCustomizations": { "activityBar.background": "#4B2301", "titleBar.activeBackground": "#693002", diff --git a/project/MDK_V5/BC1C.uvoptx b/project/MDK_V5/BC2C.uvoptx similarity index 99% rename from project/MDK_V5/BC1C.uvoptx rename to project/MDK_V5/BC2C.uvoptx index ae428f2..9f291d0 100644 --- a/project/MDK_V5/BC1C.uvoptx +++ b/project/MDK_V5/BC2C.uvoptx @@ -17,7 +17,7 @@ 0 - BC1C + BC2C 0x4 ARM-ADS diff --git a/project/MDK_V5/BC1C.uvprojx b/project/MDK_V5/BC2C.uvprojx similarity index 91% rename from project/MDK_V5/BC1C.uvprojx rename to project/MDK_V5/BC2C.uvprojx index 350d66a..7c734be 100644 --- a/project/MDK_V5/BC1C.uvprojx +++ b/project/MDK_V5/BC2C.uvprojx @@ -4,22 +4,22 @@
### uVision Project, (C) Keil Software
- BC1C + BC2C 0x4 ARM-ADS 5060960::V5.06 update 7 (build 960)::.\ARMCC 0 - -AT32F403ARCT7 + -AT32F403ACGT7 ArteryTek ArteryTek.AT32F403A_407_DFP.2.1.5 - IRAM(0x20000000,0x6000000) IROM(0x08000000,0x10000000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ELITTLE + IRAM(0x20000000,0x6000000) IROM(0x08000000,0x40000000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ELITTLE - UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0AT32F403A_256 -FS08000000 -FL0400000 -FP0($$Device:-AT32F403ARCT7$Flash\AT32F403A_256.FLM)) + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0AT32F403A_1024 -FS08000000 -FL1000000 -FP0($$Device:-AT32F403ACGT7$Flash\AT32F403A_1024.FLM)) 0 - $$Device:-AT32F403ARCT7$Device\Include\at32f403a_407.h + $$Device:-AT32F403ACGT7$Device\Include\at32f403a_407.h @@ -29,7 +29,7 @@ - $$Device:-AT32F403ARCT7$SVD\AT32F403Axx_v2.svd + $$Device:-AT32F403ACGT7$SVD\AT32F403Axx_v2.svd 0 0 @@ -45,7 +45,7 @@ 1 .\objects\ - BC1C + BC2C 1 0 1 @@ -247,7 +247,7 @@ 1 0x8000000 - 0x40000 + 0x100000 0 @@ -272,7 +272,7 @@ 1 0x8000000 - 0x40000 + 0x100000 1 @@ -333,7 +333,7 @@ 0 - AT32F403ARCT7,USE_STDPERIPH_DRIVER,AT_START_F403A_V1 + AT32F403ACGT7,USE_STDPERIPH_DRIVER,AT_START_F403A_V1 ..\..\libraries\drivers\inc;..\..\libraries\cmsis\cm4\core_support;..\..\libraries\cmsis\cm4\device_support;..\inc @@ -399,11 +399,6 @@ firmware - - at32f403a_407_adc.c - 1 - ..\..\libraries\drivers\src\at32f403a_407_adc.c - at32f403a_407_can.c 1 @@ -419,11 +414,6 @@ 1 ..\..\libraries\drivers\src\at32f403a_407_debug.c - - at32f403a_407_exint.c - 1 - ..\..\libraries\drivers\src\at32f403a_407_exint.c - at32f403a_407_flash.c 1 @@ -434,11 +424,6 @@ 1 ..\..\libraries\drivers\src\at32f403a_407_gpio.c - - at32f403a_407_i2c.c - 1 - ..\..\libraries\drivers\src\at32f403a_407_i2c.c - at32f403a_407_misc.c 1 @@ -449,21 +434,11 @@ 1 ..\..\libraries\drivers\src\at32f403a_407_pwc.c - - at32f403a_407_tmr.c - 1 - ..\..\libraries\drivers\src\at32f403a_407_tmr.c - at32f403a_407_usart.c 1 ..\..\libraries\drivers\src\at32f403a_407_usart.c - - at32f403a_407_crc.c - 1 - ..\..\libraries\drivers\src\at32f403a_407_crc.c - @@ -492,7 +467,7 @@ - BC1C + BC2C 0 1 diff --git a/project/inc/at32f403a_407_conf.h b/project/inc/at32f403a_407_conf.h index a9bbcdb..bb1b015 100644 --- a/project/inc/at32f403a_407_conf.h +++ b/project/inc/at32f403a_407_conf.h @@ -39,7 +39,7 @@ extern "C" { * */ #if !defined HEXT_VALUE -#define HEXT_VALUE ((uint32_t)8000000) /*!< value of the high speed exernal crystal in hz */ +#define HEXT_VALUE ((uint32_t)16000000) /*!< value of the high speed exernal crystal in hz */ #endif /** @@ -64,7 +64,7 @@ extern "C" { /*#define EXINT_MODULE_ENABLED--------------------*/ #define FLASH_MODULE_ENABLED #define GPIO_MODULE_ENABLED -#define I2C_MODULE_ENABLED +/*#define I2C_MODULE_ENABLED----------------------*/ #define MISC_MODULE_ENABLED #define PWC_MODULE_ENABLED /*#define RTC_MODULE_ENABLED----------------------*/ diff --git a/project/inc/at32f403a_407_wk_config.h b/project/inc/at32f403a_407_wk_config.h index de91330..449ad4b 100644 --- a/project/inc/at32f403a_407_wk_config.h +++ b/project/inc/at32f403a_407_wk_config.h @@ -55,65 +55,6 @@ extern "C" { /* add user code end exported macro */ -/* add user code begin dma define */ -/* user can only modify the dma define value */ -//#define DMA1_CHANNEL1_BUFFER_SIZE 0 -//#define DMA1_CHANNEL1_MEMORY_BASE_ADDR 0 -//#define DMA1_CHANNEL1_PERIPHERAL_BASE_ADDR 0 - -//#define DMA1_CHANNEL2_BUFFER_SIZE 0 -//#define DMA1_CHANNEL2_MEMORY_BASE_ADDR 0 -//#define DMA1_CHANNEL2_PERIPHERAL_BASE_ADDR 0 - -//#define DMA1_CHANNEL3_BUFFER_SIZE 0 -//#define DMA1_CHANNEL3_MEMORY_BASE_ADDR 0 -//#define DMA1_CHANNEL3_PERIPHERAL_BASE_ADDR 0 - -//#define DMA1_CHANNEL4_BUFFER_SIZE 0 -//#define DMA1_CHANNEL4_MEMORY_BASE_ADDR 0 -//#define DMA1_CHANNEL4_PERIPHERAL_BASE_ADDR 0 - -//#define DMA1_CHANNEL5_BUFFER_SIZE 0 -//#define DMA1_CHANNEL5_MEMORY_BASE_ADDR 0 -//#define DMA1_CHANNEL5_PERIPHERAL_BASE_ADDR 0 - -//#define DMA1_CHANNEL6_BUFFER_SIZE 0 -//#define DMA1_CHANNEL6_MEMORY_BASE_ADDR 0 -//#define DMA1_CHANNEL6_PERIPHERAL_BASE_ADDR 0 - -//#define DMA1_CHANNEL7_BUFFER_SIZE 0 -//#define DMA1_CHANNEL7_MEMORY_BASE_ADDR 0 -//#define DMA1_CHANNEL7_PERIPHERAL_BASE_ADDR 0 - -//#define DMA2_CHANNEL1_BUFFER_SIZE 0 -//#define DMA2_CHANNEL1_MEMORY_BASE_ADDR 0 -//#define DMA2_CHANNEL1_PERIPHERAL_BASE_ADDR 0 - -//#define DMA2_CHANNEL2_BUFFER_SIZE 0 -//#define DMA2_CHANNEL2_MEMORY_BASE_ADDR 0 -//#define DMA2_CHANNEL2_PERIPHERAL_BASE_ADDR 0 - -//#define DMA2_CHANNEL3_BUFFER_SIZE 0 -//#define DMA2_CHANNEL3_MEMORY_BASE_ADDR 0 -//#define DMA2_CHANNEL3_PERIPHERAL_BASE_ADDR 0 - -//#define DMA2_CHANNEL4_BUFFER_SIZE 0 -//#define DMA2_CHANNEL4_MEMORY_BASE_ADDR 0 -//#define DMA2_CHANNEL4_PERIPHERAL_BASE_ADDR 0 - -//#define DMA2_CHANNEL5_BUFFER_SIZE 0 -//#define DMA2_CHANNEL5_MEMORY_BASE_ADDR 0 -//#define DMA2_CHANNEL5_PERIPHERAL_BASE_ADDR 0 - -//#define DMA2_CHANNEL6_BUFFER_SIZE 0 -//#define DMA2_CHANNEL6_MEMORY_BASE_ADDR 0 -//#define DMA2_CHANNEL6_PERIPHERAL_BASE_ADDR 0 - -//#define DMA2_CHANNEL7_BUFFER_SIZE 0 -//#define DMA2_CHANNEL7_MEMORY_BASE_ADDR 0 -//#define DMA2_CHANNEL7_PERIPHERAL_BASE_ADDR 0 -/* add user code end dma define */ - /* exported functions ------------------------------------------------------- */ /* system clock config. */ void wk_system_clock_config(void); @@ -130,12 +71,6 @@ extern "C" { /* init gpio function. */ void wk_gpio_config(void); - /* init i2c1 function. */ - void wk_i2c1_init(void); - - /* init i2c2 function. */ - void wk_i2c2_init(void); - /* init can1 function. */ void wk_can1_init(void); @@ -157,12 +92,6 @@ extern "C" { /* init tmr8 function. */ void wk_tmr8_init(void); - /* init tmr11 function. */ - void wk_tmr11_init(void); - - /* init tmr12 function. */ - void wk_tmr12_init(void); - /* init crc function. */ void wk_crc_init(void); diff --git a/project/src/at32f403a_407_int.c b/project/src/at32f403a_407_int.c index b7733ad..35b51a3 100644 --- a/project/src/at32f403a_407_int.c +++ b/project/src/at32f403a_407_int.c @@ -1,27 +1,27 @@ /* add user code begin Header */ /** - ************************************************************************** - * @file at32f403a_407_int.c - * @brief main interrupt service routines. - ************************************************************************** - * Copyright notice & Disclaimer - * - * The software Board Support Package (BSP) that is made available to - * download from Artery official website is the copyrighted work of Artery. - * Artery authorizes customers to use, copy, and distribute the BSP - * software and its related documentation for the purpose of design and - * development in conjunction with Artery microcontrollers. Use of the - * software is governed by this copyright notice and the following disclaimer. - * - * THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, - * GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, - * TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR - * STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, - * INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT. - * - ************************************************************************** - */ + ************************************************************************** + * @file at32f403a_407_int.c + * @brief main interrupt service routines. + ************************************************************************** + * Copyright notice & Disclaimer + * + * The software Board Support Package (BSP) that is made available to + * download from Artery official website is the copyrighted work of Artery. + * Artery authorizes customers to use, copy, and distribute the BSP + * software and its related documentation for the purpose of design and + * development in conjunction with Artery microcontrollers. Use of the + * software is governed by this copyright notice and the following disclaimer. + * + * THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, + * GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, + * TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR + * STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, + * INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT. + * + ************************************************************************** + */ /* add user code end Header */ /* includes ------------------------------------------------------------------*/ diff --git a/project/src/at32f403a_407_wk_config.c b/project/src/at32f403a_407_wk_config.c index a22c9bd..423370b 100644 --- a/project/src/at32f403a_407_wk_config.c +++ b/project/src/at32f403a_407_wk_config.c @@ -1,27 +1,27 @@ /* add user code begin Header */ /** - ************************************************************************** - * @file at32f403a_407_wk_config.c - * @brief work bench config program - ************************************************************************** - * Copyright notice & Disclaimer - * - * The software Board Support Package (BSP) that is made available to - * download from Artery official website is the copyrighted work of Artery. - * Artery authorizes customers to use, copy, and distribute the BSP - * software and its related documentation for the purpose of design and - * development in conjunction with Artery microcontrollers. Use of the - * software is governed by this copyright notice and the following disclaimer. - * - * THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, - * GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, - * TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR - * STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, - * INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT. - * - ************************************************************************** - */ + ************************************************************************** + * @file at32f403a_407_wk_config.c + * @brief work bench config program + ************************************************************************** + * Copyright notice & Disclaimer + * + * The software Board Support Package (BSP) that is made available to + * download from Artery official website is the copyrighted work of Artery. + * Artery authorizes customers to use, copy, and distribute the BSP + * software and its related documentation for the purpose of design and + * development in conjunction with Artery microcontrollers. Use of the + * software is governed by this copyright notice and the following disclaimer. + * + * THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES, + * GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS, + * TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR + * STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS, + * INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT. + * + ************************************************************************** + */ /* add user code end Header */ #include "at32f403a_407_wk_config.h" @@ -64,8 +64,8 @@ /** * @brief system clock config program * @note the system clock is configured as follow: - * system clock (sclk) = hick / 12 * pll_mult - * system clock source = HICK_VALUE + * system clock (sclk) = hext / 2 * pll_mult + * system clock source = HEXT_VALUE * - hext = HEXT_VALUE * - sclk = 240000000 * - ahbdiv = 1 @@ -74,7 +74,7 @@ * - apb1clk = 120000000 * - apb2div = 2 * - apb2clk = 120000000 - * - pll_mult = 60 + * - pll_mult = 30 * - pll_range = GT72MHZ (greater than 72 mhz) * @param none * @retval none @@ -109,7 +109,10 @@ void wk_system_clock_config(void) } /* config pll clock resource */ - crm_pll_config(CRM_PLL_SOURCE_HICK, CRM_PLL_MULT_60, CRM_PLL_OUTPUT_RANGE_GT72MHZ); + crm_pll_config(CRM_PLL_SOURCE_HEXT_DIV, CRM_PLL_MULT_30, CRM_PLL_OUTPUT_RANGE_GT72MHZ); + + /* config hext division */ + crm_hext_clock_div_set(CRM_HEXT_DIV_2); /* enable pll */ crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE); @@ -165,9 +168,6 @@ void wk_periph_clock_config(void) /* enable gpiob periph clock */ crm_periph_clock_enable(CRM_GPIOB_PERIPH_CLOCK, TRUE); - /* enable gpioc periph clock */ - crm_periph_clock_enable(CRM_GPIOC_PERIPH_CLOCK, TRUE); - /* enable gpiod periph clock */ crm_periph_clock_enable(CRM_GPIOD_PERIPH_CLOCK, TRUE); @@ -177,27 +177,15 @@ void wk_periph_clock_config(void) /* enable usart1 periph clock */ crm_periph_clock_enable(CRM_USART1_PERIPH_CLOCK, TRUE); - /* enable tmr11 periph clock */ - crm_periph_clock_enable(CRM_TMR11_PERIPH_CLOCK, TRUE); - /* enable tmr6 periph clock */ crm_periph_clock_enable(CRM_TMR6_PERIPH_CLOCK, TRUE); - /* enable tmr12 periph clock */ - crm_periph_clock_enable(CRM_TMR12_PERIPH_CLOCK, TRUE); - /* enable usart2 periph clock */ crm_periph_clock_enable(CRM_USART2_PERIPH_CLOCK, TRUE); /* enable usart3 periph clock */ crm_periph_clock_enable(CRM_USART3_PERIPH_CLOCK, TRUE); - /* enable i2c1 periph clock */ - crm_periph_clock_enable(CRM_I2C1_PERIPH_CLOCK, TRUE); - - /* enable i2c2 periph clock */ - crm_periph_clock_enable(CRM_I2C2_PERIPH_CLOCK, TRUE); - /* enable can1 periph clock */ crm_periph_clock_enable(CRM_CAN1_PERIPH_CLOCK, TRUE); @@ -251,133 +239,21 @@ void wk_gpio_config(void) /* add user code end gpio_config 1 */ - /* gpio input config */ - gpio_init_struct.gpio_mode = GPIO_MODE_INPUT; - gpio_init_struct.gpio_pins = GPIO_PINS_4 | GPIO_PINS_5 | GPIO_PINS_6 | GPIO_PINS_7; - gpio_init_struct.gpio_pull = GPIO_PULL_NONE; - gpio_init(GPIOA, &gpio_init_struct); - - gpio_init_struct.gpio_mode = GPIO_MODE_INPUT; - gpio_init_struct.gpio_pins = GPIO_PINS_2; - gpio_init_struct.gpio_pull = GPIO_PULL_NONE; - gpio_init(GPIOD, &gpio_init_struct); - - gpio_init_struct.gpio_mode = GPIO_MODE_INPUT; - gpio_init_struct.gpio_pins = GPIO_PINS_3 | GPIO_PINS_4 | GPIO_PINS_5; - gpio_init_struct.gpio_pull = GPIO_PULL_NONE; - gpio_init(GPIOB, &gpio_init_struct); - /* gpio output config */ - gpio_bits_set(GPIOC, GPIO_PINS_0 | GPIO_PINS_1 | GPIO_PINS_2 | GPIO_PINS_3); + gpio_bits_reset(GPIOB, GPIO_PINS_6 | GPIO_PINS_7); - gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER; + gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_MODERATE; gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; gpio_init_struct.gpio_mode = GPIO_MODE_OUTPUT; - gpio_init_struct.gpio_pins = GPIO_PINS_0 | GPIO_PINS_1 | GPIO_PINS_2 | GPIO_PINS_3; + gpio_init_struct.gpio_pins = GPIO_PINS_6 | GPIO_PINS_7; gpio_init_struct.gpio_pull = GPIO_PULL_NONE; - gpio_init(GPIOC, &gpio_init_struct); + gpio_init(GPIOB, &gpio_init_struct); /* add user code begin gpio_config 2 */ /* add user code end gpio_config 2 */ } -/** - * @brief init i2c1 function. - * @param none - * @retval none - */ -void wk_i2c1_init(void) -{ - /* add user code begin i2c1_init 0 */ - - /* add user code end i2c1_init 0 */ - - gpio_init_type gpio_init_struct; - - gpio_default_para_init(&gpio_init_struct); - - /* add user code begin i2c1_init 1 */ - - /* add user code end i2c1_init 1 */ - - /* configure the SCL pin */ - gpio_init_struct.gpio_out_type = GPIO_OUTPUT_OPEN_DRAIN; - gpio_init_struct.gpio_pull = GPIO_PULL_NONE; - gpio_init_struct.gpio_mode = GPIO_MODE_MUX; - gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_MODERATE; - gpio_init_struct.gpio_pins = GPIO_PINS_6; - gpio_init(GPIOB, &gpio_init_struct); - - /* configure the SDA pin */ - gpio_init_struct.gpio_out_type = GPIO_OUTPUT_OPEN_DRAIN; - gpio_init_struct.gpio_pull = GPIO_PULL_NONE; - gpio_init_struct.gpio_mode = GPIO_MODE_MUX; - gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_MODERATE; - gpio_init_struct.gpio_pins = GPIO_PINS_7; - gpio_init(GPIOB, &gpio_init_struct); - - i2c_init(I2C1, I2C_FSMODE_DUTY_2_1, 100000); - i2c_own_address1_set(I2C1, I2C_ADDRESS_MODE_7BIT, 0x0); - i2c_ack_enable(I2C1, TRUE); - i2c_clock_stretch_enable(I2C1, TRUE); - i2c_general_call_enable(I2C1, FALSE); - - i2c_enable(I2C1, TRUE); - - /* add user code begin i2c1_init 2 */ - - /* add user code end i2c1_init 2 */ -} - -/** - * @brief init i2c2 function. - * @param none - * @retval none - */ -void wk_i2c2_init(void) -{ - /* add user code begin i2c2_init 0 */ - - /* add user code end i2c2_init 0 */ - - gpio_init_type gpio_init_struct; - - gpio_default_para_init(&gpio_init_struct); - - /* add user code begin i2c2_init 1 */ - - /* add user code end i2c2_init 1 */ - - /* configure the SCL pin */ - gpio_init_struct.gpio_out_type = GPIO_OUTPUT_OPEN_DRAIN; - gpio_init_struct.gpio_pull = GPIO_PULL_NONE; - gpio_init_struct.gpio_mode = GPIO_MODE_MUX; - gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_MODERATE; - gpio_init_struct.gpio_pins = GPIO_PINS_10; - gpio_init(GPIOB, &gpio_init_struct); - - /* configure the SDA pin */ - gpio_init_struct.gpio_out_type = GPIO_OUTPUT_OPEN_DRAIN; - gpio_init_struct.gpio_pull = GPIO_PULL_NONE; - gpio_init_struct.gpio_mode = GPIO_MODE_MUX; - gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_MODERATE; - gpio_init_struct.gpio_pins = GPIO_PINS_11; - gpio_init(GPIOB, &gpio_init_struct); - - i2c_init(I2C2, I2C_FSMODE_DUTY_2_1, 100000); - i2c_own_address1_set(I2C2, I2C_ADDRESS_MODE_7BIT, 0x0); - i2c_ack_enable(I2C2, TRUE); - i2c_clock_stretch_enable(I2C2, TRUE); - i2c_general_call_enable(I2C2, FALSE); - - i2c_enable(I2C2, TRUE); - - /* add user code begin i2c2_init 2 */ - - /* add user code end i2c2_init 2 */ -} - /** * @brief init usart1 function * @param none @@ -516,7 +392,7 @@ void wk_usart3_init(void) gpio_init_struct.gpio_mode = GPIO_MODE_MUX; gpio_init_struct.gpio_pins = GPIO_PINS_10; gpio_init_struct.gpio_pull = GPIO_PULL_NONE; - gpio_init(GPIOC, &gpio_init_struct); + gpio_init(GPIOB, &gpio_init_struct); /* configure the RX pin */ gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_MODERATE; @@ -524,9 +400,7 @@ void wk_usart3_init(void) gpio_init_struct.gpio_mode = GPIO_MODE_INPUT; gpio_init_struct.gpio_pins = GPIO_PINS_11; gpio_init_struct.gpio_pull = GPIO_PULL_NONE; - gpio_init(GPIOC, &gpio_init_struct); - - gpio_pin_remap_config(USART3_GMUX_0001, TRUE); + gpio_init(GPIOB, &gpio_init_struct); /* configure param */ usart_init(USART3, 115200, USART_DATA_8BITS, USART_STOP_1_BIT); @@ -600,48 +474,11 @@ void wk_tmr8_init(void) /* add user code end tmr8_init 0 */ - gpio_init_type gpio_init_struct; - tmr_output_config_type tmr_output_struct; - tmr_brkdt_config_type tmr_brkdt_struct; - - gpio_default_para_init(&gpio_init_struct); /* add user code begin tmr8_init 1 */ /* add user code end tmr8_init 1 */ - /* configure the CH1 pin */ - gpio_init_struct.gpio_pins = GPIO_PINS_6; - gpio_init_struct.gpio_mode = GPIO_MODE_MUX; - gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; - gpio_init_struct.gpio_pull = GPIO_PULL_NONE; - gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_MODERATE; - gpio_init(GPIOC, &gpio_init_struct); - - /* configure the CH2 pin */ - gpio_init_struct.gpio_pins = GPIO_PINS_7; - gpio_init_struct.gpio_mode = GPIO_MODE_MUX; - gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; - gpio_init_struct.gpio_pull = GPIO_PULL_NONE; - gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_MODERATE; - gpio_init(GPIOC, &gpio_init_struct); - - /* configure the CH3 pin */ - gpio_init_struct.gpio_pins = GPIO_PINS_8; - gpio_init_struct.gpio_mode = GPIO_MODE_MUX; - gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; - gpio_init_struct.gpio_pull = GPIO_PULL_NONE; - gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_MODERATE; - gpio_init(GPIOC, &gpio_init_struct); - - /* configure the CH4 pin */ - gpio_init_struct.gpio_pins = GPIO_PINS_9; - gpio_init_struct.gpio_mode = GPIO_MODE_MUX; - gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; - gpio_init_struct.gpio_pull = GPIO_PULL_NONE; - gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_MODERATE; - gpio_init(GPIOC, &gpio_init_struct); - /* configure counter settings */ tmr_base_init(TMR8, 2399, 1999); tmr_cnt_dir_set(TMR8, TMR_COUNT_UP); @@ -653,67 +490,6 @@ void wk_tmr8_init(void) tmr_sub_sync_mode_set(TMR8, FALSE); tmr_primary_mode_select(TMR8, TMR_PRIMARY_SEL_RESET); - /* configure channel 1 output settings */ - tmr_output_struct.oc_mode = TMR_OUTPUT_CONTROL_OFF; - tmr_output_struct.oc_output_state = TRUE; - tmr_output_struct.occ_output_state = FALSE; - tmr_output_struct.oc_polarity = TMR_OUTPUT_ACTIVE_HIGH; - tmr_output_struct.occ_polarity = TMR_OUTPUT_ACTIVE_HIGH; - tmr_output_struct.oc_idle_state = FALSE; - tmr_output_struct.occ_idle_state = FALSE; - tmr_output_channel_config(TMR8, TMR_SELECT_CHANNEL_1, &tmr_output_struct); - tmr_channel_value_set(TMR8, TMR_SELECT_CHANNEL_1, 0); - tmr_output_channel_buffer_enable(TMR8, TMR_SELECT_CHANNEL_1, FALSE); - - /* configure channel 2 output settings */ - tmr_output_struct.oc_mode = TMR_OUTPUT_CONTROL_OFF; - tmr_output_struct.oc_output_state = TRUE; - tmr_output_struct.occ_output_state = FALSE; - tmr_output_struct.oc_polarity = TMR_OUTPUT_ACTIVE_HIGH; - tmr_output_struct.occ_polarity = TMR_OUTPUT_ACTIVE_HIGH; - tmr_output_struct.oc_idle_state = FALSE; - tmr_output_struct.occ_idle_state = FALSE; - tmr_output_channel_config(TMR8, TMR_SELECT_CHANNEL_2, &tmr_output_struct); - tmr_channel_value_set(TMR8, TMR_SELECT_CHANNEL_2, 0); - tmr_output_channel_buffer_enable(TMR8, TMR_SELECT_CHANNEL_2, FALSE); - - /* configure channel 3 output settings */ - tmr_output_struct.oc_mode = TMR_OUTPUT_CONTROL_OFF; - tmr_output_struct.oc_output_state = TRUE; - tmr_output_struct.occ_output_state = FALSE; - tmr_output_struct.oc_polarity = TMR_OUTPUT_ACTIVE_HIGH; - tmr_output_struct.occ_polarity = TMR_OUTPUT_ACTIVE_HIGH; - tmr_output_struct.oc_idle_state = FALSE; - tmr_output_struct.occ_idle_state = FALSE; - tmr_output_channel_config(TMR8, TMR_SELECT_CHANNEL_3, &tmr_output_struct); - tmr_channel_value_set(TMR8, TMR_SELECT_CHANNEL_3, 0); - tmr_output_channel_buffer_enable(TMR8, TMR_SELECT_CHANNEL_3, FALSE); - - /* configure channel 4 output settings */ - tmr_output_struct.oc_mode = TMR_OUTPUT_CONTROL_OFF; - tmr_output_struct.oc_output_state = TRUE; - tmr_output_struct.occ_output_state = FALSE; - tmr_output_struct.oc_polarity = TMR_OUTPUT_ACTIVE_HIGH; - tmr_output_struct.occ_polarity = TMR_OUTPUT_ACTIVE_HIGH; - tmr_output_struct.oc_idle_state = FALSE; - tmr_output_struct.occ_idle_state = FALSE; - tmr_output_channel_config(TMR8, TMR_SELECT_CHANNEL_4, &tmr_output_struct); - tmr_channel_value_set(TMR8, TMR_SELECT_CHANNEL_4, 0); - tmr_output_channel_buffer_enable(TMR8, TMR_SELECT_CHANNEL_4, FALSE); - - /* configure break and dead-time settings */ - tmr_brkdt_struct.brk_enable = FALSE; - tmr_brkdt_struct.auto_output_enable = FALSE; - tmr_brkdt_struct.brk_polarity = TMR_BRK_INPUT_ACTIVE_LOW; - tmr_brkdt_struct.fcsoen_state = FALSE; - tmr_brkdt_struct.fcsodis_state = FALSE; - tmr_brkdt_struct.wp_level = TMR_WP_OFF; - tmr_brkdt_struct.deadtime = 0; - tmr_brkdt_config(TMR8, &tmr_brkdt_struct); - - - tmr_output_enable(TMR8, TRUE); - tmr_counter_enable(TMR8, TRUE); /* add user code begin tmr8_init 2 */ @@ -721,132 +497,6 @@ void wk_tmr8_init(void) /* add user code end tmr8_init 2 */ } -/** - * @brief init tmr11 function. - * @param none - * @retval none - */ -void wk_tmr11_init(void) -{ - /* add user code begin tmr11_init 0 */ - - /* add user code end tmr11_init 0 */ - - gpio_init_type gpio_init_struct; - tmr_output_config_type tmr_output_struct; - gpio_default_para_init(&gpio_init_struct); - - /* add user code begin tmr11_init 1 */ - - /* add user code end tmr11_init 1 */ - - /* configure the CH1 pin */ - gpio_init_struct.gpio_pins = GPIO_PINS_9; - gpio_init_struct.gpio_mode = GPIO_MODE_MUX; - gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; - gpio_init_struct.gpio_pull = GPIO_PULL_NONE; - gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_MODERATE; - gpio_init(GPIOB, &gpio_init_struct); - - /* configure counter settings */ - tmr_base_init(TMR11, 2399, 99); - tmr_cnt_dir_set(TMR11, TMR_COUNT_UP); - tmr_clock_source_div_set(TMR11, TMR_CLOCK_DIV1); - tmr_period_buffer_enable(TMR11, FALSE); - - /* configure channel 1 output settings */ - tmr_output_struct.oc_mode = TMR_OUTPUT_CONTROL_PWM_MODE_A; - tmr_output_struct.oc_output_state = TRUE; - tmr_output_struct.occ_output_state = FALSE; - tmr_output_struct.oc_polarity = TMR_OUTPUT_ACTIVE_HIGH; - tmr_output_struct.occ_polarity = TMR_OUTPUT_ACTIVE_HIGH; - tmr_output_struct.oc_idle_state = FALSE; - tmr_output_struct.occ_idle_state = FALSE; - tmr_output_channel_config(TMR11, TMR_SELECT_CHANNEL_1, &tmr_output_struct); - tmr_channel_value_set(TMR11, TMR_SELECT_CHANNEL_1, 0); - tmr_output_channel_buffer_enable(TMR11, TMR_SELECT_CHANNEL_1, FALSE); - - tmr_output_channel_immediately_set(TMR11, TMR_SELECT_CHANNEL_1, FALSE); - - tmr_counter_enable(TMR11, TRUE); - - /* add user code begin tmr11_init 2 */ - - /* add user code end tmr11_init 2 */ -} - -/** - * @brief init tmr12 function. - * @param none - * @retval none - */ -void wk_tmr12_init(void) -{ - /* add user code begin tmr12_init 0 */ - - /* add user code end tmr12_init 0 */ - - gpio_init_type gpio_init_struct; - tmr_output_config_type tmr_output_struct; - gpio_default_para_init(&gpio_init_struct); - - /* add user code begin tmr12_init 1 */ - - /* add user code end tmr12_init 1 */ - - /* configure the CH1 pin */ - gpio_init_struct.gpio_pins = GPIO_PINS_14; - gpio_init_struct.gpio_mode = GPIO_MODE_MUX; - gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; - gpio_init_struct.gpio_pull = GPIO_PULL_NONE; - gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_MODERATE; - gpio_init(GPIOB, &gpio_init_struct); - - /* configure the CH2 pin */ - gpio_init_struct.gpio_pins = GPIO_PINS_15; - gpio_init_struct.gpio_mode = GPIO_MODE_MUX; - gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; - gpio_init_struct.gpio_pull = GPIO_PULL_NONE; - gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_MODERATE; - gpio_init(GPIOB, &gpio_init_struct); - - /* configure counter settings */ - tmr_base_init(TMR12, 65535, 0); - tmr_cnt_dir_set(TMR12, TMR_COUNT_UP); - tmr_clock_source_div_set(TMR12, TMR_CLOCK_DIV1); - tmr_period_buffer_enable(TMR12, FALSE); - - /* configure channel 1 output settings */ - tmr_output_struct.oc_mode = TMR_OUTPUT_CONTROL_OFF; - tmr_output_struct.oc_output_state = TRUE; - tmr_output_struct.occ_output_state = FALSE; - tmr_output_struct.oc_polarity = TMR_OUTPUT_ACTIVE_HIGH; - tmr_output_struct.occ_polarity = TMR_OUTPUT_ACTIVE_HIGH; - tmr_output_struct.oc_idle_state = FALSE; - tmr_output_struct.occ_idle_state = FALSE; - tmr_output_channel_config(TMR12, TMR_SELECT_CHANNEL_1, &tmr_output_struct); - tmr_channel_value_set(TMR12, TMR_SELECT_CHANNEL_1, 0); - tmr_output_channel_buffer_enable(TMR12, TMR_SELECT_CHANNEL_1, FALSE); - - /* configure channel 2 output settings */ - tmr_output_struct.oc_mode = TMR_OUTPUT_CONTROL_OFF; - tmr_output_struct.oc_output_state = TRUE; - tmr_output_struct.occ_output_state = FALSE; - tmr_output_struct.oc_polarity = TMR_OUTPUT_ACTIVE_HIGH; - tmr_output_struct.occ_polarity = TMR_OUTPUT_ACTIVE_HIGH; - tmr_output_struct.oc_idle_state = FALSE; - tmr_output_struct.occ_idle_state = FALSE; - tmr_output_channel_config(TMR12, TMR_SELECT_CHANNEL_2, &tmr_output_struct); - tmr_channel_value_set(TMR12, TMR_SELECT_CHANNEL_2, 0); - tmr_output_channel_buffer_enable(TMR12, TMR_SELECT_CHANNEL_2, FALSE); - - tmr_counter_enable(TMR12, TRUE); - - /* add user code begin tmr12_init 2 */ - - /* add user code end tmr12_init 2 */ -} - /** * @brief init can1 function. * @param none @@ -900,9 +550,9 @@ void wk_can1_init(void) /*can_baudrate_setting-------------------------------------------------------------*/ /*set baudrate = pclk/(baudrate_div *(1 + bts1_size + bts2_size))------------------*/ - can_baudrate_struct.baudrate_div = 24; /*value: 1~0xFFF*/ + can_baudrate_struct.baudrate_div = 30; /*value: 1~0xFFF*/ can_baudrate_struct.rsaw_size = CAN_RSAW_1TQ; /*value: 1~4*/ - can_baudrate_struct.bts1_size = CAN_BTS1_8TQ; /*value: 1~16*/ + can_baudrate_struct.bts1_size = CAN_BTS1_6TQ; /*value: 1~16*/ can_baudrate_struct.bts2_size = CAN_BTS2_1TQ; /*value: 1~8*/ can_baudrate_set(CAN1, &can_baudrate_struct); @@ -989,9 +639,9 @@ void wk_can2_init(void) /*can_baudrate_setting-------------------------------------------------------------*/ /*set baudrate = pclk/(baudrate_div *(1 + bts1_size + bts2_size))------------------*/ - can_baudrate_struct.baudrate_div = 24; /*value: 1~0xFFF*/ + can_baudrate_struct.baudrate_div = 30; /*value: 1~0xFFF*/ can_baudrate_struct.rsaw_size = CAN_RSAW_1TQ; /*value: 1~4*/ - can_baudrate_struct.bts1_size = CAN_BTS1_8TQ; /*value: 1~16*/ + can_baudrate_struct.bts1_size = CAN_BTS1_6TQ; /*value: 1~16*/ can_baudrate_struct.bts2_size = CAN_BTS2_1TQ; /*value: 1~8*/ can_baudrate_set(CAN2, &can_baudrate_struct); diff --git a/project/src/main.c b/project/src/main.c index 96cae07..5c7ee40 100644 --- a/project/src/main.c +++ b/project/src/main.c @@ -69,10 +69,10 @@ /* add user code end 0 */ /** - * @brief main function. - * @param none - * @retval none - */ + * @brief main function. + * @param none + * @retval none + */ int main(void) { /* add user code begin 1 */ @@ -100,24 +100,12 @@ int main(void) /* init usart3 function. */ wk_usart3_init(); - /* init i2c1 function. */ - wk_i2c1_init(); - - /* init i2c2 function. */ - wk_i2c2_init(); - /* init tmr6 function. */ wk_tmr6_init(); /* init tmr8 function. */ wk_tmr8_init(); - /* init tmr11 function. */ - wk_tmr11_init(); - - /* init tmr12 function. */ - wk_tmr12_init(); - /* init can1 function. */ wk_can1_init(); @@ -141,21 +129,24 @@ int main(void) LOGD("eeprom init done"); /* motion init */ - by_motion_init(); - LOGD("motion init done"); + // by_motion_init(); + // LOGD("motion init done"); /* messy init */ - by_messy_init(); - LOGD("frame init done"); + // by_messy_init(); + // LOGD("frame init done"); LOGI("init done"); /* add user code end 2 */ - while (1) { + while(1) + { /* add user code begin 3 */ - by_messy_loop(); - by_motion_loop(); + // by_messy_loop(); + // by_motion_loop(); + gpio_bits_write(GPIOB, GPIO_PINS_6, !gpio_output_data_bit_read(GPIOB, GPIO_PINS_6)); + DWT_Delay(500000); /* add user code end 3 */ } }