747 lines
35 KiB
C
747 lines
35 KiB
C
/********************************** (C) COPYRIGHT *******************************
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* File Name : ch32v30x_usbotg_device.h
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* Author : WCH
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* Version : V1.0.0
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* Date : 2021/06/06
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* Description : This file contains all the functions prototypes for the
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* USBOTG firmware library.
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*******************************************************************************/
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#ifndef __CH32V30X_USBOTG_DEVICE_H_
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#define __CH32V30X_USBOTG_DEVICE_H_
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#include "string.h"
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#ifndef NULL
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#define NULL 0
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#endif
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#ifndef VOID
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#define VOID void
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#endif
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#ifndef CONST
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#define CONST const
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#endif
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#ifndef BOOL
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typedef unsigned char BOOL;
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#endif
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#ifndef BOOLEAN
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typedef unsigned char BOOLEAN;
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#endif
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#ifndef CHAR
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typedef char CHAR;
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#endif
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#ifndef INT8
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typedef char INT8;
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#endif
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#ifndef INT16
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typedef short INT16;
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#endif
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#ifndef INT32
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typedef long INT32;
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#endif
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#ifndef UINT8
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typedef unsigned char UINT8;
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#endif
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#ifndef UINT16
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typedef unsigned short UINT16;
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#endif
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#ifndef UINT32
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typedef unsigned long UINT32;
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#endif
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#ifndef UINT8V
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typedef unsigned char volatile UINT8V;
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#endif
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#ifndef UINT16V
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typedef unsigned short volatile UINT16V;
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#endif
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#ifndef UINT32V
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typedef unsigned long volatile UINT32V;
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#endif
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#ifndef PVOID
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typedef void *PVOID;
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#endif
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#ifndef PCHAR
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typedef char *PCHAR;
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#endif
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#ifndef PCHAR
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typedef const char *PCCHAR;
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#endif
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#ifndef PINT8
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typedef char *PINT8;
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#endif
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#ifndef PINT16
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typedef short *PINT16;
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#endif
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#ifndef PINT32
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typedef long *PINT32;
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#endif
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#ifndef PUINT8
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typedef unsigned char *PUINT8;
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#endif
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#ifndef PUINT16
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typedef unsigned short *PUINT16;
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#endif
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#ifndef PUINT32
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typedef unsigned long *PUINT32;
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#endif
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#ifndef PUINT8V
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typedef volatile unsigned char *PUINT8V;
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#endif
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#ifndef PUINT16V
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typedef volatile unsigned short *PUINT16V;
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#endif
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#ifndef PUINT32V
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typedef volatile unsigned long *PUINT32V;
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#endif
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/* USB constant and structure define */
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/* USB PID */
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#ifndef USB_PID_SETUP
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#define USB_PID_NULL 0x00 /* reserved PID */
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#define USB_PID_SOF 0x05
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#define USB_PID_SETUP 0x0D
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#define USB_PID_IN 0x09
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#define USB_PID_OUT 0x01
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#define USB_PID_ACK 0x02
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#define USB_PID_NAK 0x0A
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#define USB_PID_STALL 0x0E
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#define USB_PID_DATA0 0x03
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#define USB_PID_DATA1 0x0B
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#define USB_PID_PRE 0x0C
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#endif
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/* USB standard device request code */
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#ifndef USB_GET_DESCRIPTOR
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#define USB_GET_STATUS 0x00
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#define USB_CLEAR_FEATURE 0x01
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#define USB_SET_FEATURE 0x03
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#define USB_SET_ADDRESS 0x05
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#define USB_GET_DESCRIPTOR 0x06
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#define USB_SET_DESCRIPTOR 0x07
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#define USB_GET_CONFIGURATION 0x08
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#define USB_SET_CONFIGURATION 0x09
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#define USB_GET_INTERFACE 0x0A
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#define USB_SET_INTERFACE 0x0B
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#define USB_SYNCH_FRAME 0x0C
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#endif
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/* USB hub class request code */
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#ifndef HUB_GET_DESCRIPTOR
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#define HUB_GET_STATUS 0x00
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#define HUB_CLEAR_FEATURE 0x01
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#define HUB_GET_STATE 0x02
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#define HUB_SET_FEATURE 0x03
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#define HUB_GET_DESCRIPTOR 0x06
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#define HUB_SET_DESCRIPTOR 0x07
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#endif
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/* USB HID class request code */
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#ifndef HID_GET_REPORT
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#define HID_GET_REPORT 0x01
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#define HID_GET_IDLE 0x02
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#define HID_GET_PROTOCOL 0x03
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#define HID_SET_REPORT 0x09
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#define HID_SET_IDLE 0x0A
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#define HID_SET_PROTOCOL 0x0B
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#endif
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/* Bit define for USB request type */
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#ifndef USB_REQ_TYP_MASK
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#define USB_REQ_TYP_IN 0x80 /* control IN, device to host */
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#define USB_REQ_TYP_OUT 0x00 /* control OUT, host to device */
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#define USB_REQ_TYP_READ 0x80 /* control read, device to host */
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#define USB_REQ_TYP_WRITE 0x00 /* control write, host to device */
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#define USB_REQ_TYP_MASK 0x60 /* bit mask of request type */
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#define USB_REQ_TYP_STANDARD 0x00
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#define USB_REQ_TYP_CLASS 0x20
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#define USB_REQ_TYP_VENDOR 0x40
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#define USB_REQ_TYP_RESERVED 0x60
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#define USB_REQ_RECIP_MASK 0x1F /* bit mask of request recipient */
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#define USB_REQ_RECIP_DEVICE 0x00
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#define USB_REQ_RECIP_INTERF 0x01
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#define USB_REQ_RECIP_ENDP 0x02
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#define USB_REQ_RECIP_OTHER 0x03
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#endif
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/* USB request type for hub class request */
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#ifndef HUB_GET_HUB_DESCRIPTOR
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#define HUB_CLEAR_HUB_FEATURE 0x20
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#define HUB_CLEAR_PORT_FEATURE 0x23
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#define HUB_GET_BUS_STATE 0xA3
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#define HUB_GET_HUB_DESCRIPTOR 0xA0
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#define HUB_GET_HUB_STATUS 0xA0
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#define HUB_GET_PORT_STATUS 0xA3
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#define HUB_SET_HUB_DESCRIPTOR 0x20
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#define HUB_SET_HUB_FEATURE 0x20
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#define HUB_SET_PORT_FEATURE 0x23
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#endif
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/* Hub class feature selectors */
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#ifndef HUB_PORT_RESET
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#define HUB_C_HUB_LOCAL_POWER 0
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#define HUB_C_HUB_OVER_CURRENT 1
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#define HUB_PORT_CONNECTION 0
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#define HUB_PORT_ENABLE 1
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#define HUB_PORT_SUSPEND 2
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#define HUB_PORT_OVER_CURRENT 3
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#define HUB_PORT_RESET 4
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#define HUB_PORT_POWER 8
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#define HUB_PORT_LOW_SPEED 9
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#define HUB_C_PORT_CONNECTION 16
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#define HUB_C_PORT_ENABLE 17
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#define HUB_C_PORT_SUSPEND 18
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#define HUB_C_PORT_OVER_CURRENT 19
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#define HUB_C_PORT_RESET 20
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#endif
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/* USB descriptor type */
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#ifndef USB_DESCR_TYP_DEVICE
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#define USB_DESCR_TYP_DEVICE 0x01
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#define USB_DESCR_TYP_CONFIG 0x02
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#define USB_DESCR_TYP_STRING 0x03
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#define USB_DESCR_TYP_INTERF 0x04
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#define USB_DESCR_TYP_ENDP 0x05
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#define USB_DESCR_TYP_QUALIF 0x06
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#define USB_DESCR_TYP_SPEED 0x07
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#define USB_DESCR_TYP_OTG 0x09
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#define USB_DESCR_TYP_BOS 0X0F
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#define USB_DESCR_TYP_HID 0x21
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#define USB_DESCR_TYP_REPORT 0x22
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#define USB_DESCR_TYP_PHYSIC 0x23
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#define USB_DESCR_TYP_CS_INTF 0x24
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#define USB_DESCR_TYP_CS_ENDP 0x25
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#define USB_DESCR_TYP_HUB 0x29
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#endif
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/* USB device class */
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#ifndef USB_DEV_CLASS_HUB
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#define USB_DEV_CLASS_RESERVED 0x00
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#define USB_DEV_CLASS_AUDIO 0x01
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#define USB_DEV_CLASS_COMMUNIC 0x02
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#define USB_DEV_CLASS_HID 0x03
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#define USB_DEV_CLASS_MONITOR 0x04
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#define USB_DEV_CLASS_PHYSIC_IF 0x05
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#define USB_DEV_CLASS_POWER 0x06
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#define USB_DEV_CLASS_PRINTER 0x07
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#define USB_DEV_CLASS_STORAGE 0x08
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#define USB_DEV_CLASS_HUB 0x09
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#define USB_DEV_CLASS_VEN_SPEC 0xFF
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#endif
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/* USB endpoint type and attributes */
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#ifndef USB_ENDP_TYPE_MASK
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#define USB_ENDP_DIR_MASK 0x80
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#define USB_ENDP_ADDR_MASK 0x0F
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#define USB_ENDP_TYPE_MASK 0x03
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#define USB_ENDP_TYPE_CTRL 0x00
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#define USB_ENDP_TYPE_ISOCH 0x01
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#define USB_ENDP_TYPE_BULK 0x02
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#define USB_ENDP_TYPE_INTER 0x03
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#endif
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#ifndef USB_DEVICE_ADDR
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#define USB_DEVICE_ADDR 0x02
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#endif
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#ifndef DEFAULT_ENDP0_SIZE
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#define DEFAULT_ENDP0_SIZE 8 /* default maximum packet size for endpoint 0 */
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#endif
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#ifndef MAX_PACKET_SIZE
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#define MAX_PACKET_SIZE 64 /* maximum packet size */
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#endif
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#ifndef USB_BO_CBW_SIZE
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#define USB_BO_CBW_SIZE 0x1F
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#define USB_BO_CSW_SIZE 0x0D
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#endif
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#ifndef USB_BO_CBW_SIG0
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#define USB_BO_CBW_SIG0 0x55
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#define USB_BO_CBW_SIG1 0x53
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#define USB_BO_CBW_SIG2 0x42
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#define USB_BO_CBW_SIG3 0x43
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#define USB_BO_CSW_SIG0 0x55
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#define USB_BO_CSW_SIG1 0x53
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#define USB_BO_CSW_SIG2 0x42
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#define USB_BO_CSW_SIG3 0x53
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#endif
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#ifndef __PACKED
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#define __PACKED __attribute__((packed))
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#endif
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typedef struct __PACKED _USB_SETUP_REQ {
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UINT8 bRequestType;
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UINT8 bRequest;
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UINT16 wValue;
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UINT16 wIndex;
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UINT16 wLength;
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} USB_SETUP_REQ, *PUSB_SETUP_REQ;
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typedef struct __PACKED _USB_DEVICE_DESCR {
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UINT8 bLength;
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UINT8 bDescriptorType;
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UINT16 bcdUSB;
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UINT8 bDeviceClass;
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UINT8 bDeviceSubClass;
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UINT8 bDeviceProtocol;
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UINT8 bMaxPacketSize0;
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UINT16 idVendor;
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UINT16 idProduct;
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UINT16 bcdDevice;
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UINT8 iManufacturer;
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UINT8 iProduct;
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UINT8 iSerialNumber;
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UINT8 bNumConfigurations;
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} USB_DEV_DESCR, *PUSB_DEV_DESCR;
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typedef struct __PACKED _USB_CONFIG_DESCR {
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UINT8 bLength;
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UINT8 bDescriptorType;
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UINT16 wTotalLength;
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UINT8 bNumInterfaces;
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UINT8 bConfigurationValue;
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UINT8 iConfiguration;
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UINT8 bmAttributes;
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UINT8 MaxPower;
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} USB_CFG_DESCR, *PUSB_CFG_DESCR;
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typedef struct __PACKED _USB_INTERF_DESCR {
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UINT8 bLength;
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UINT8 bDescriptorType;
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UINT8 bInterfaceNumber;
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UINT8 bAlternateSetting;
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UINT8 bNumEndpoints;
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UINT8 bInterfaceClass;
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UINT8 bInterfaceSubClass;
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UINT8 bInterfaceProtocol;
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UINT8 iInterface;
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} USB_ITF_DESCR, *PUSB_ITF_DESCR;
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typedef struct __PACKED _USB_ENDPOINT_DESCR {
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UINT8 bLength;
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UINT8 bDescriptorType;
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UINT8 bEndpointAddress;
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UINT8 bmAttributes;
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UINT16 wMaxPacketSize;
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UINT8 bInterval;
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} USB_ENDP_DESCR, *PUSB_ENDP_DESCR;
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typedef struct __PACKED _USB_CONFIG_DESCR_LONG {
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USB_CFG_DESCR cfg_descr;
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USB_ITF_DESCR itf_descr;
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USB_ENDP_DESCR endp_descr[1];
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} USB_CFG_DESCR_LONG, *PUSB_CFG_DESCR_LONG;
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typedef struct __PACKED _USB_HUB_DESCR {
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UINT8 bDescLength;
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UINT8 bDescriptorType;
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UINT8 bNbrPorts;
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UINT8 wHubCharacteristicsL;
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UINT8 wHubCharacteristicsH;
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UINT8 bPwrOn2PwrGood;
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UINT8 bHubContrCurrent;
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UINT8 DeviceRemovable;
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UINT8 PortPwrCtrlMask;
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} USB_HUB_DESCR, *PUSB_HUB_DESCR;
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typedef struct __PACKED _USB_HID_DESCR {
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UINT8 bLength;
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UINT8 bDescriptorType;
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UINT16 bcdHID;
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UINT8 bCountryCode;
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UINT8 bNumDescriptors;
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UINT8 bDescriptorTypeX;
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UINT8 wDescriptorLengthL;
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UINT8 wDescriptorLengthH;
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} USB_HID_DESCR, *PUSB_HID_DESCR;
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typedef struct __PACKED _UDISK_BOC_CBW {/* command of BulkOnly USB-FlashDisk */
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UINT32 mCBW_Sig;
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UINT32 mCBW_Tag;
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UINT32 mCBW_DataLen; /* uppest byte of data length, always is 0 */
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UINT8 mCBW_Flag; /* transfer direction and etc. */
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UINT8 mCBW_LUN;
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UINT8 mCBW_CB_Len; /* length of command block */
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UINT8 mCBW_CB_Buf[16]; /* command block buffer */
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} UDISK_BOC_CBW, *PXUDISK_BOC_CBW;
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typedef struct __PACKED _UDISK_BOC_CSW {/* status of BulkOnly USB-FlashDisk */
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UINT32 mCBW_Sig;
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UINT32 mCBW_Tag;
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UINT32 mCSW_Residue; /* return: remainder bytes */ /* uppest byte of remainder length, always is 0 */
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UINT8 mCSW_Status; /* return: result status */
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} UDISK_BOC_CSW, *PXUDISK_BOC_CSW;
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/* <20><><EFBFBD><EFBFBD><EFBFBD>Ժ궨<D4BA><EAB6A8> */
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#define USE_SYS_CLK 0
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//#define USBHD_HOST 0
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//#define USB_OTG 0
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/******************************************************************************/
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/* USBOTG_FS DEVICE USB_CONTROL */
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/* BASE USB_CTRL */
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#define USBHD_BASE_CTRL (USBOTG_FS->BASE_CTRL) // USB base control
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#define USBHD_UC_HOST_MODE 0x80 // enable USB host mode: 0=device mode, 1=host mode
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#define USBHD_UC_LOW_SPEED 0x40 // enable USB low speed: 0=12Mbps, 1=1.5Mbps
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#define USBHD_UC_DEV_PU_EN 0x20 // USB device enable and internal pullup resistance enable
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#define USBHD_UC_SYS_CTRL1 0x20 // USB system control high bit
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#define USBHD_UC_SYS_CTRL0 0x10 // USB system control low bit
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#define USBHD_UC_SYS_CTRL_MASK 0x30 // bit mask of USB system control
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// UC_HOST_MODE & UC_SYS_CTRL1 & UC_SYS_CTRL0: USB system control
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// 0 00: disable USB device and disable internal pullup resistance
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// 0 01: enable USB device and disable internal pullup resistance, need external pullup resistance
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// 0 1x: enable USB device and enable internal pullup resistance
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// 1 00: enable USB host and normal status
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// 1 01: enable USB host and force UDP/UDM output SE0 state
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// 1 10: enable USB host and force UDP/UDM output J state
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// 1 11: enable USB host and force UDP/UDM output resume or K state
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#define USBHD_UC_INT_BUSY 0x08 // enable automatic responding busy for device mode or automatic pause for host mode during interrupt flag UIF_TRANSFER valid
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#define USBHD_UC_RESET_SIE 0x04 // force reset USB SIE, need software clear
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#define USBHD_UC_CLR_ALL 0x02 // force clear FIFO and count of USB
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#define USBHD_UC_DMA_EN 0x01 // DMA enable and DMA interrupt enable for USB
|
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/* DEVICE USB_CTRL */
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#define USBHD_UDEV_CTRL (USBOTG_FS->UDEV_CTRL) // USB device physical prot control
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#define USBHD_UD_PD_DIS 0x80 // disable USB UDP/UDM pulldown resistance: 0=enable pulldown, 1=disable
|
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#define USBHD_UD_DP_PIN 0x20 // ReadOnly: indicate current UDP pin level
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#define USBHD_UD_DM_PIN 0x10 // ReadOnly: indicate current UDM pin level
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#define USBHD_UD_LOW_SPEED 0x04 // enable USB physical port low speed: 0=full speed, 1=low speed
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#define USBHD_UD_GP_BIT 0x02 // general purpose bit
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#define USBHD_UD_PORT_EN 0x01 // enable USB physical port I/O: 0=disable, 1=enable
|
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/* USB INT EN */
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#define USBHD_INT_EN (USBOTG_FS->INT_EN) // USB interrupt enable
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#define USBHD_UIE_DEV_SOF 0x80 // enable interrupt for SOF received for USB device mode
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#define USBHD_UIE_DEV_NAK 0x40 // enable interrupt for NAK responded for USB device mode
|
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#define USBHD_UIE_FIFO_OV 0x10 // enable interrupt for FIFO overflow
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#define USBHD_UIE_HST_SOF 0x08 // enable interrupt for host SOF timer action for USB host mode
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#define USBHD_UIE_SUSPEND 0x04 // enable interrupt for USB suspend or resume event
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#define USBHD_UIE_TRANSFER 0x02 // enable interrupt for USB transfer completion
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#define USBHD_UIE_DETECT 0x01 // enable interrupt for USB device detected event for USB host mode
|
||
#define USBHD_UIE_BUS_RST 0x01 // enable interrupt for USB bus reset event for USB device mode
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/* USB_DEV_ADDR */
|
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#define USBHD_DEV_ADDR (USBOTG_FS->DEV_ADDR) // USB device address
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#define USBHD_UDA_GP_BIT 0x80 // general purpose bit
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#define USBHD_USB_ADDR_MASK 0x7F // bit mask for USB device address
|
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/* USBOTG_FS DEVICE USB_STATUS */
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/* USB_MIS_ST */
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#define USBHD_MIS_ST (USBOTG_FS->MIS_ST) // USB miscellaneous status
|
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#define USBHD_UMS_SOF_PRES 0x80 // RO, indicate host SOF timer presage status
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#define USBHD_UMS_SOF_ACT 0x40 // RO, indicate host SOF timer action status for USB host
|
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#define USBHD_UMS_SIE_FREE 0x20 // RO, indicate USB SIE free status
|
||
#define USBHD_UMS_R_FIFO_RDY 0x10 // RO, indicate USB receiving FIFO ready status (not empty)
|
||
#define USBHD_UMS_BUS_RESET 0x08 // RO, indicate USB bus reset status
|
||
#define USBHD_UMS_SUSPEND 0x04 // RO, indicate USB suspend status
|
||
#define USBHD_UMS_DM_LEVEL 0x02 // RO, indicate UDM level saved at device attached to USB host
|
||
#define USBHD_UMS_DEV_ATTACH 0x01 // RO, indicate device attached status on USB host
|
||
/* USB_INT_FG */
|
||
#define USBHD_INT_FG (USBOTG_FS->INT_FG) // USB interrupt flag
|
||
#define USBHD_U_IS_NAK 0x80 // RO, indicate current USB transfer is NAK received
|
||
#define USBHD_U_TOG_OK 0x40 // RO, indicate current USB transfer toggle is OK
|
||
#define USBHD_U_SIE_FREE 0x20 // RO, indicate USB SIE free status
|
||
#define USBHD_UIF_FIFO_OV 0x10 // FIFO overflow interrupt flag for USB, direct bit address clear or write 1 to clear
|
||
#define USBHD_UIF_HST_SOF 0x08 // host SOF timer interrupt flag for USB host, direct bit address clear or write 1 to clear
|
||
#define USBHD_UIF_SUSPEND 0x04 // USB suspend or resume event interrupt flag, direct bit address clear or write 1 to clear
|
||
#define USBHD_UIF_TRANSFER 0x02 // USB transfer completion interrupt flag, direct bit address clear or write 1 to clear
|
||
#define USBHD_UIF_DETECT 0x01 // device detected event interrupt flag for USB host mode, direct bit address clear or write 1 to clear
|
||
#define USBHD_UIF_BUS_RST 0x01 // bus reset event interrupt flag for USB device mode, direct bit address clear or write 1 to clear
|
||
/* USB_INT_ST */
|
||
#define USBHD_INT_ST (USBOTG_FS->INT_ST) // USB interrupt flag
|
||
#define USBHD_UIS_IS_SETUP 0x80 // RO, indicate current USB transfer is setup received for USB device mode
|
||
#define USBHD_UIS_IS_NAK 0x80 // RO, indicate current USB transfer is NAK received for USB device mode
|
||
#define USBHD_UIS_TOG_OK 0x40 // RO, indicate current USB transfer toggle is OK
|
||
#define USBHD_UIS_TOKEN1 0x20 // RO, current token PID code bit 1 received for USB device mode
|
||
#define USBHD_UIS_TOKEN0 0x10 // RO, current token PID code bit 0 received for USB device mode
|
||
#define USBHD_UIS_TOKEN_MASK 0x30 // RO, bit mask of current token PID code received for USB device mode
|
||
#define USBHD_UIS_TOKEN_OUT 0x00
|
||
#define USBHD_UIS_TOKEN_SOF 0x10
|
||
#define USBHD_UIS_TOKEN_IN 0x20
|
||
#define USBHD_UIS_TOKEN_SETUP 0x30
|
||
// UIS_TOKEN1 & UIS_TOKEN0: current token PID code received for USB device mode
|
||
// 00: OUT token PID received
|
||
// 01: SOF token PID received
|
||
// 10: IN token PID received
|
||
// 11: SETUP token PID received
|
||
#define USBHD_UIS_ENDP_MASK 0x0F // RO, bit mask of current transfer endpoint number for USB device mode
|
||
/* USB_RX_LEN */
|
||
#define USBHD_RX_LEN (USBOTG_FS->Rx_Len) // USB receiving length
|
||
/* USB_BUF_MOD */
|
||
#define USBHD_UEP4_1_MOD (USBOTG_FS->UEP4_1_MOD) // endpoint 4/1 mode
|
||
#define USBHD_UEP1_RX_EN 0x80 // enable USB endpoint 1 receiving (OUT)
|
||
#define USBHD_UEP1_TX_EN 0x40 // enable USB endpoint 1 transmittal (IN)
|
||
#define USBHD_UEP1_BUF_MOD 0x10 // buffer mode of USB endpoint 1
|
||
// UEPn_RX_EN & UEPn_TX_EN & UEPn_BUF_MOD: USB endpoint 1/2/3 buffer mode, buffer start address is UEPn_DMA
|
||
// 0 0 x: disable endpoint and disable buffer
|
||
// 1 0 0: 64 bytes buffer for receiving (OUT endpoint)
|
||
// 1 0 1: dual 64 bytes buffer by toggle bit bUEP_R_TOG selection for receiving (OUT endpoint), total=128bytes
|
||
// 0 1 0: 64 bytes buffer for transmittal (IN endpoint)
|
||
// 0 1 1: dual 64 bytes buffer by toggle bit bUEP_T_TOG selection for transmittal (IN endpoint), total=128bytes
|
||
// 1 1 0: 64 bytes buffer for receiving (OUT endpoint) + 64 bytes buffer for transmittal (IN endpoint), total=128bytes
|
||
// 1 1 1: dual 64 bytes buffer by bUEP_R_TOG selection for receiving (OUT endpoint) + dual 64 bytes buffer by bUEP_T_TOG selection for transmittal (IN endpoint), total=256bytes
|
||
#define USBHD_UEP4_RX_EN 0x08 // enable USB endpoint 4 receiving (OUT)
|
||
#define USBHD_UEP4_TX_EN 0x04 // enable USB endpoint 4 transmittal (IN)
|
||
// UEP4_RX_EN & UEP4_TX_EN: USB endpoint 4 buffer mode, buffer start address is UEP0_DMA
|
||
// 0 0: single 64 bytes buffer for endpoint 0 receiving & transmittal (OUT & IN endpoint)
|
||
// 1 0: single 64 bytes buffer for endpoint 0 receiving & transmittal (OUT & IN endpoint) + 64 bytes buffer for endpoint 4 receiving (OUT endpoint), total=128bytes
|
||
// 0 1: single 64 bytes buffer for endpoint 0 receiving & transmittal (OUT & IN endpoint) + 64 bytes buffer for endpoint 4 transmittal (IN endpoint), total=128bytes
|
||
// 1 1: single 64 bytes buffer for endpoint 0 receiving & transmittal (OUT & IN endpoint)
|
||
// + 64 bytes buffer for endpoint 4 receiving (OUT endpoint) + 64 bytes buffer for endpoint 4 transmittal (IN endpoint), total=192bytes
|
||
|
||
#define USBHD_UEP2_3_MOD (USBOTG_FS->UEP2_3_MOD) // endpoint 2/3 mode
|
||
#define USBHD_UEP3_RX_EN 0x80 // enable USB endpoint 3 receiving (OUT)
|
||
#define USBHD_UEP3_TX_EN 0x40 // enable USB endpoint 3 transmittal (IN)
|
||
#define USBHD_UEP3_BUF_MOD 0x10 // buffer mode of USB endpoint 3
|
||
#define USBHD_UEP2_RX_EN 0x08 // enable USB endpoint 2 receiving (OUT)
|
||
#define USBHD_UEP2_TX_EN 0x04 // enable USB endpoint 2 transmittal (IN)
|
||
#define USBHD_UEP2_BUF_MOD 0x01 // buffer mode of USB endpoint 2
|
||
|
||
#define USBHD_UEP5_6_MOD (USBOTG_FS->UEP5_6_MOD) // endpoint 5/6 mode
|
||
#define USBHD_UEP6_RX_EN 0x80 // enable USB endpoint 6 receiving (OUT)
|
||
#define USBHD_UEP6_TX_EN 0x40 // enable USB endpoint 6 transmittal (IN)
|
||
#define USBHD_UEP6_BUF_MOD 0x10 // buffer mode of USB endpoint 6
|
||
#define USBHD_UEP5_RX_EN 0x08 // enable USB endpoint 5 receiving (OUT)
|
||
#define USBHD_UEP5_TX_EN 0x04 // enable USB endpoint 5 transmittal (IN)
|
||
#define USBHD_UEP5_BUF_MOD 0x01 // buffer mode of USB endpoint 5
|
||
|
||
#define USBHD_UEP7_MOD (USBOTG_FS->UEP7_MOD) // endpoint 7 mode
|
||
#define USBHD_UEP7_RX_EN 0x08 // enable USB endpoint 7 receiving (OUT)
|
||
#define USBHD_UEP7_TX_EN 0x04 // enable USB endpoint 7 transmittal (IN)
|
||
#define USBHD_UEP7_BUF_MOD 0x01 // buffer mode of USB endpoint 7
|
||
/* USB_DMA */
|
||
#define USBHD_UEP0_DMA (USBOTG_FS->UEP0_DMA) // endpoint 0 DMA buffer address
|
||
#define USBHD_UEP1_DMA (USBOTG_FS->UEP1_DMA) // endpoint 1 DMA buffer address
|
||
#define USBHD_UEP2_DMA (USBOTG_FS->UEP2_DMA) // endpoint 2 DMA buffer address
|
||
#define USBHD_UEP3_DMA (USBOTG_FS->UEP3_DMA) // endpoint 3 DMA buffer address
|
||
#define USBHD_UEP4_DMA (USBOTG_FS->UEP4_DMA) // endpoint 4 DMA buffer address
|
||
#define USBHD_UEP5_DMA (USBOTG_FS->UEP5_DMA) // endpoint 5 DMA buffer address
|
||
#define USBHD_UEP6_DMA (USBOTG_FS->UEP6_DMA) // endpoint 6 DMA buffer address
|
||
#define USBHD_UEP7_DMA (USBOTG_FS->UEP7_DMA) // endpoint 7 DMA buffer address
|
||
/* USB_EP_CTRL */
|
||
#define USBHD_UEP0_T_LEN (USBOTG_FS->UEP0_TX_LEN) // endpoint 0 transmittal length
|
||
#define USBHD_UEP0_TX_CTRL (USBOTG_FS->UEP0_TX_CTRL) // endpoint 0 control
|
||
#define USBHD_UEP0_RX_CTRL (USBOTG_FS->UEP0_RX_CTRL) // endpoint 0 control
|
||
|
||
#define USBHD_UEP1_T_LEN (USBOTG_FS->UEP1_TX_LEN) // endpoint 1 transmittal length
|
||
#define USBHD_UEP1_TX_CTRL (USBOTG_FS->UEP1_TX_CTRL) // endpoint 1 control
|
||
#define USBHD_UEP1_RX_CTRL (USBOTG_FS->UEP1_RX_CTRL) // endpoint 1 control
|
||
|
||
#define USBHD_UEP2_T_LEN (USBOTG_FS->UEP2_TX_LEN) // endpoint 2 transmittal length
|
||
#define USBHD_UEP2_TX_CTRL (USBOTG_FS->UEP2_TX_CTRL) // endpoint 2 control
|
||
#define USBHD_UEP2_RX_CTRL (USBOTG_FS->UEP2_RX_CTRL) // endpoint 2 control
|
||
|
||
#define USBHD_UEP3_T_LEN (USBOTG_FS->UEP3_TX_LEN) // endpoint 3 transmittal length
|
||
#define USBHD_UEP3_TX_CTRL (USBOTG_FS->UEP3_TX_CTRL) // endpoint 3 control
|
||
#define USBHD_UEP3_RX_CTRL (USBOTG_FS->UEP3_RX_CTRL) // endpoint 3 control
|
||
|
||
#define USBHD_UEP4_T_LEN (USBOTG_FS->UEP4_TX_LEN) // endpoint 4 transmittal length
|
||
#define USBHD_UEP4_TX_CTRL (USBOTG_FS->UEP4_TX_CTRL) // endpoint 4 control
|
||
#define USBHD_UEP4_RX_CTRL (USBOTG_FS->UEP4_RX_CTRL) // endpoint 4 control
|
||
|
||
#define USBHD_UEP5_T_LEN (USBOTG_FS->UEP5_TX_LEN) // endpoint 5 transmittal length
|
||
#define USBHD_UEP5_TX_CTRL (USBOTG_FS->UEP5_TX_CTRL) // endpoint 5 control
|
||
#define USBHD_UEP5_RX_CTRL (USBOTG_FS->UEP5_RX_CTRL) // endpoint 5 control
|
||
|
||
#define USBHD_UEP6_T_LEN (USBOTG_FS->UEP6_TX_LEN) // endpoint 6 transmittal length
|
||
#define USBHD_UEP6_TX_CTRL (USBOTG_FS->UEP6_TX_CTRL) // endpoint 6 control
|
||
#define USBHD_UEP6_RX_CTRL (USBOTG_FS->UEP6_RX_CTRL) // endpoint 6 control
|
||
|
||
#define USBHD_UEP7_T_LEN (USBOTG_FS->UEP7_TX_LEN) // endpoint 7 transmittal length
|
||
#define USBHD_UEP7_TX_CTRL (USBOTG_FS->UEP7_TX_CTRL) // endpoint 7 control
|
||
#define USBHD_UEP7_RX_CTRL (USBOTG_FS->UEP7_RX_CTRL) // endpoint 7 control
|
||
|
||
#define USBHD_UEP_AUTO_TOG 0x08 // enable automatic toggle after successful transfer completion on endpoint 1/2/3: 0=manual toggle, 1=automatic toggle
|
||
#define USBHD_UEP_R_TOG 0x04 // expected data toggle flag of USB endpoint X receiving (OUT): 0=DATA0, 1=DATA1
|
||
#define USBHD_UEP_T_TOG 0x04 // prepared data toggle flag of USB endpoint X transmittal (IN): 0=DATA0, 1=DATA1
|
||
|
||
#define USBHD_UEP_R_RES1 0x02 // handshake response type high bit for USB endpoint X receiving (OUT)
|
||
#define USBHD_UEP_R_RES0 0x01 // handshake response type low bit for USB endpoint X receiving (OUT)
|
||
#define USBHD_UEP_R_RES_MASK 0x03 // bit mask of handshake response type for USB endpoint X receiving (OUT)
|
||
#define USBHD_UEP_R_RES_ACK 0x00
|
||
#define USBHD_UEP_R_RES_TOUT 0x01
|
||
#define USBHD_UEP_R_RES_NAK 0x02
|
||
#define USBHD_UEP_R_RES_STALL 0x03
|
||
// RB_UEP_R_RES1 & RB_UEP_R_RES0: handshake response type for USB endpoint X receiving (OUT)
|
||
// 00: ACK (ready)
|
||
// 01: no response, time out to host, for non-zero endpoint isochronous transactions
|
||
// 10: NAK (busy)
|
||
// 11: STALL (error)
|
||
#define USBHD_UEP_T_RES1 0x02 // handshake response type high bit for USB endpoint X transmittal (IN)
|
||
#define USBHD_UEP_T_RES0 0x01 // handshake response type low bit for USB endpoint X transmittal (IN)
|
||
#define USBHD_UEP_T_RES_MASK 0x03 // bit mask of handshake response type for USB endpoint X transmittal (IN)
|
||
#define USBHD_UEP_T_RES_ACK 0x00
|
||
#define USBHD_UEP_T_RES_TOUT 0x01
|
||
#define USBHD_UEP_T_RES_NAK 0x02
|
||
#define USBHD_UEP_T_RES_STALL 0x03
|
||
// bUEP_T_RES1 & bUEP_T_RES0: handshake response type for USB endpoint X transmittal (IN)
|
||
// 00: DATA0 or DATA1 then expecting ACK (ready)
|
||
// 01: DATA0 or DATA1 then expecting no response, time out from host, for non-zero endpoint isochronous transactions
|
||
// 10: NAK (busy)
|
||
// 11: TALL (error)
|
||
|
||
#ifdef USBHD_HOST
|
||
/* USBOTG_FS HOST CONTROL&CFG */
|
||
/* HOST USB_CTRL */
|
||
#define USBHD_UHOST_CTRL (USBOTG_FS->UDEV_CTRL) // USB host physical prot control
|
||
#define USBHD_UH_PD_DIS 0x80 // disable USB UDP/UDM pulldown resistance: 0=enable pulldown, 1=disable
|
||
#define USBHD_UH_DP_PIN 0x20 // ReadOnly: indicate current UDP pin level
|
||
#define USBHD_UH_DM_PIN 0x10 // ReadOnly: indicate current UDM pin level
|
||
#define USBHD_UH_LOW_SPEED 0x04 // enable USB port low speed: 0=full speed, 1=low speed
|
||
#define USBHD_UH_BUS_RESET 0x02 // control USB bus reset: 0=normal, 1=force bus reset
|
||
#define USBHD_UH_PORT_EN 0x01 // enable USB port: 0=disable, 1=enable port, automatic disabled if USB device detached
|
||
/* USB_INT_ST */
|
||
#define USBHD_UIS_H_RES_MASK 0x0F // RO, bit mask of current transfer handshake response for USB host mode: 0000=no response, time out from device, others=handshake response PID received
|
||
/* USB_BUF_MOD */
|
||
#define USBHD_UH_EP_MOD USBHD_UEP2_3_MOD //host endpoint mode
|
||
#define USBHD__UH_EP_TX_EN 0x40 // enable USB host OUT endpoint transmittal
|
||
#define USBHD__UH_EP_TBUF_MOD 0x10 // buffer mode of USB host OUT endpoint
|
||
// UH_EP_TX_EN & UH_EP_TBUF_MOD: USB host OUT endpoint buffer mode, buffer start address is UH_TX_DMA
|
||
// 0 x: disable endpoint and disable buffer
|
||
// 1 0: 64 bytes buffer for transmittal (OUT endpoint)
|
||
// 1 1: dual 64 bytes buffer by toggle bit bUH_T_TOG selection for transmittal (OUT endpoint), total=128bytes
|
||
#define USBHD_UH_EP_RX_EN 0x08 // enable USB host IN endpoint receiving
|
||
#define USBHD_UH_EP_RBUF_MOD 0x01 // buffer mode of USB host IN endpoint
|
||
// UH_EP_RX_EN & UH_EP_RBUF_MOD: USB host IN endpoint buffer mode, buffer start address is UH_RX_DMA
|
||
// 0 x: disable endpoint and disable buffer
|
||
// 1 0: 64 bytes buffer for receiving (IN endpoint)
|
||
// 1 1: dual 64 bytes buffer by toggle bit bUH_R_TOG selection for receiving (IN endpoint), total=128bytes
|
||
/* USB_DMA */
|
||
#define USBHD_UH_RX_DMA USBHD_UEP2_DMA // host rx endpoint buffer high address
|
||
#define USBHD_UH_TX_DMA USBHD_UEP3_DMA // host tx endpoint buffer high address
|
||
/* USB_HOST_SETUP */
|
||
#define USBHD_UH_SETUP (*((PUINT16V)(0x50000036))) // host aux setup
|
||
#define USBHD_UH_PRE_PID_EN 0x0400 // USB host PRE PID enable for low speed device via hub
|
||
#define USBHD_UH_SOF_EN 0x04 // USB host automatic SOF enable
|
||
#define USBHD_UH_EP_PID USBHD_UEP2_T_LEN // host endpoint and PID
|
||
#define USBHD_UH_TOKEN_MASK 0xF0 // bit mask of token PID for USB host transfer
|
||
#define USBHD_UH_ENDP_MASK 0x0F // bit mask of endpoint number for USB host transfer
|
||
|
||
#define USBHD_UH_RX_CTRL USBHD_UEP2_RX_CTRL // host receiver endpoint control
|
||
#define USBHD_UH_R_AUTO_TOG 0x08 // enable automatic toggle after successful transfer completion: 0=manual toggle, 1=automatic toggle
|
||
#define USBHD_UH_R_TOG 0x04 // expected data toggle flag of host receiving (IN): 0=DATA0, 1=DATA1
|
||
#define USBHD_UH_R_RES 0x01 // prepared handshake response type for host receiving (IN): 0=ACK (ready), 1=no response, time out to device, for isochronous transactions
|
||
|
||
#define USBHD_UH_RX_CTRL USBHD_UEP2_RX_CTRL // host receiver endpoint control
|
||
#define USBHD_UH_R_AUTO_TOG 0x08 // enable automatic toggle after successful transfer completion: 0=manual toggle, 1=automatic toggle
|
||
#define USBHD_UH_R_TOG 0x04 // expected data toggle flag of host receiving (IN): 0=DATA0, 1=DATA1
|
||
#define USBHD_UH_R_RES 0x01 // prepared handshake response type for host receiving (IN): 0=ACK (ready), 1=no response, time out to device, for isochronous transactions
|
||
#define USBHD_UH_TX_LEN USBHD_UEP3_T_LEN // host transmittal endpoint transmittal length
|
||
|
||
#define USBHD_UH_TX_CTRL USBHD_UEP3_TX_CTRL // host transmittal endpoint control
|
||
#define USBHD_UH_T_AUTO_TOG 0x08 // enable automatic toggle after successful transfer completion: 0=manual toggle, 1=automatic toggle
|
||
#define USBHD_UH_T_TOG 0x04 // prepared data toggle flag of host transmittal (SETUP/OUT): 0=DATA0, 1=DATA1
|
||
#define USBHD_UH_T_RES 0x01 // expected handshake response type for host transmittal (SETUP/OUT): 0=ACK (ready), 1=no response, time out from device, for isochronous transactions
|
||
#endif
|
||
#ifdef USB_OTG
|
||
#define USB_OTG_CR (USBOTG_FS->OTG_CR) // usb otg control
|
||
#define USB_OTG_CR_SESS 0x20 // usb otg control,<2C>Ự<EFBFBD><E1BBB0>ƽʹ<C6BD><CAB9>
|
||
#define USB_OTG_CR_VBUS 0x10 // usb otg control,VBUS<55><53>ƽʹ<C6BD><CAB9>
|
||
#define USB_OTG_CR_OTG_EN 0x08 // usb otg control,OTG<54><47><EFBFBD><EFBFBD>ʹ<EFBFBD><CAB9>
|
||
#define USB_OTG_CR_IDPU 0x04 // usb otg control,ID<49><44><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||
#define USB_OTG_CR_CHARGEVBUS 0x02 // usb otg control,VBUS<55><53><EFBFBD><EFBFBD>
|
||
#define USB_OTG_CR_DISCHARGEVBUS 0x01 // usb otg control,VBUS<55>ŵ<EFBFBD>
|
||
|
||
#define USB_OTG_SR (USBOTG_FS->OTG_CR) // usb otg status
|
||
#define USB_OTG_SR_VBUS_VLD 0x01 // usb otg status,A<>豸VBUS<55><53><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ƽ<EFBFBD><C6BD>Ч
|
||
#define USB_OTG_SR_SESS_VLD 0x02 // usb otg status,<2C>Ự<EFBFBD><E1BBB0>Ч<EFBFBD><D0A7>ƽ<EFBFBD><C6BD>Ч<EFBFBD><D0A7>־
|
||
#define USB_OTG_SR_SESS_END 0x04 // usb otg status,<2C>Ự<EFBFBD><E1BBB0><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ƽ<EFBFBD><C6BD>Ч<EFBFBD><D0A7>־
|
||
#define USB_OTG_SR_ID_DIG 0x08 // usb otg status,ID<49><44>ƽ
|
||
#endif
|
||
|
||
|
||
/******************************************************************************/
|
||
/* USBHS PHY Clock Config (RCC_CFGR2) ʹ<><CAB9>USBHS PHYʱ<59>ӵ<EFBFBD><D3B5><EFBFBD><EFBFBD><EFBFBD><EFBFBD>£<EFBFBD><C2A3><EFBFBD>Ҫ<EFBFBD>õ<EFBFBD><C3B5><EFBFBD>Щ<EFBFBD>궨<EFBFBD><EAB6A8> */
|
||
#ifndef USBHS_EXIST
|
||
#define USB_48M_CLK_SRC_MASK (1<<31)
|
||
#define USB_48M_CLK_SRC_SYS (0<<31)
|
||
#define USB_48M_CLK_SRC_PHY (1<<31)
|
||
|
||
#define USBHS_PLL_ALIVE (1<<30)
|
||
|
||
#define USBHS_PLL_CKREF_MASK (3<<28)
|
||
#define USBHS_PLL_CKREF_3M (0<<28)
|
||
#define USBHS_PLL_CKREF_4M (1<<28)
|
||
#define USBHS_PLL_CKREF_8M (2<<28)
|
||
#define USBHS_PLL_CKREF_5M (3<<28)
|
||
|
||
#define USBHS_PLL_SRC_MASK (1<<27)
|
||
#define USBHS_PLL_SRC_HSE (0<<27)
|
||
#define USBHS_PLL_SRC_HSI (1<<27)
|
||
|
||
#define USBHS_PLL_SRC_PRE_MASK (7<<24)
|
||
#define USBHS_PLL_SRC_PRE_DIV1 (0<<24)
|
||
#define USBHS_PLL_SRC_PRE_DIV2 (1<<24)
|
||
#define USBHS_PLL_SRC_PRE_DIV3 (2<<24)
|
||
#define USBHS_PLL_SRC_PRE_DIV4 (3<<24)
|
||
#define USBHS_PLL_SRC_PRE_DIV5 (4<<24)
|
||
#define USBHS_PLL_SRC_PRE_DIV6 (5<<24)
|
||
#define USBHS_PLL_SRC_PRE_DIV7 (6<<24)
|
||
|
||
/* <20>˵<EFBFBD><CBB5><EFBFBD>С<EFBFBD><D0A1><EFBFBD><EFBFBD> */
|
||
#define DEF_USB_FS_EP_SIZE 64
|
||
#endif
|
||
|
||
/*ʹ<><CAB9>sysclkʱ<6B>ӵ<EFBFBD><D3B5><EFBFBD><EFBFBD><EFBFBD><EFBFBD>£<EFBFBD><C2A3><EFBFBD>Ҫ<EFBFBD>õ<EFBFBD><C3B5><EFBFBD>Щ<EFBFBD>궨<EFBFBD><EAB6A8> */
|
||
#define RCC_USBFS_CLK_DIV_1 (0<<22)
|
||
#define RCC_USBFS_CLK_DIV_2 (1<<22)
|
||
#define RCC_USBFS_CLK_DIV_3 (2<<22)
|
||
#define RCC_USBFS_CLK_SRC (1<<31)
|
||
|
||
/******************************************************************************/
|
||
/* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> */
|
||
extern PUINT8 pEP0_RAM_Addr; //ep0(64)
|
||
extern PUINT8 pEP1_RAM_Addr; //ep1_out(64)+ep1_in(64)
|
||
extern PUINT8 pEP2_RAM_Addr; //ep2_out(64)+ep2_in(64)
|
||
extern PUINT8 pEP3_RAM_Addr; //ep3_out(64)+ep3_in(64)
|
||
extern PUINT8 pEP4_RAM_Addr; //ep4_out(64)+ep4_in(64)
|
||
extern PUINT8 pEP5_RAM_Addr; //ep5_out(64)+ep5_in(64)
|
||
extern PUINT8 pEP6_RAM_Addr; //ep6_out(64)+ep6_in(64)
|
||
extern PUINT8 pEP7_RAM_Addr; //ep7_out(64)+ep7_in(64)
|
||
|
||
extern volatile UINT16 USBHD_Endp1_Up_Flag; /* USB2.0<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD>˵<EFBFBD>1<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ϴ<EFBFBD>״̬: 0:<3A><><EFBFBD><EFBFBD>; 1:<3A><><EFBFBD><EFBFBD><EFBFBD>ϴ<EFBFBD>; */
|
||
extern volatile UINT8 USBHD_Endp1_Down_Flag; /* USB2.0<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD>˵<EFBFBD>1<EFBFBD>´<EFBFBD><EFBFBD>ɹ<EFBFBD><EFBFBD><EFBFBD>־ */
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extern volatile UINT8 USBHD_Endp1_Down_Len; /* USB2.0<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD>˵<EFBFBD>1<EFBFBD>´<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> */
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extern volatile BOOL USBHD_Endp1_T_Tog; /* USB2.0<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD>˵<EFBFBD>1<EFBFBD><EFBFBD><EFBFBD><EFBFBD>togλ<EFBFBD><EFBFBD>ת */
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extern volatile BOOL USBHD_Endp1_R_Tog;
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extern volatile UINT16 USBHD_Endp2_Up_Flag; /* USB2.0<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD>˵<EFBFBD>2<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ϴ<EFBFBD>״̬: 0:<3A><><EFBFBD><EFBFBD>; 1:<3A><><EFBFBD><EFBFBD><EFBFBD>ϴ<EFBFBD>; */
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extern volatile UINT16 USBHD_Endp2_Up_LoadPtr; /* USB2.0<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD>˵<EFBFBD>2<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ϴ<EFBFBD>װ<EFBFBD><EFBFBD>ƫ<EFBFBD><EFBFBD> */
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extern volatile UINT8 USBHD_Endp2_Down_Flag; /* USB2.0<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD>˵<EFBFBD>2<EFBFBD>´<EFBFBD><EFBFBD>ɹ<EFBFBD><EFBFBD><EFBFBD>־ */
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/******************************************************************************/
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/* DMA<4D><41>ַ<EFBFBD>ͻ<EFBFBD><CDBB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>غ궨<D8BA><EAB6A8> */
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#define pSetupReqPakHD ((PUSB_SETUP_REQ)pEP0_RAM_Addr)
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#define pEP0_DataBuf (pEP0_RAM_Addr)
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#define pEP1_OUT_DataBuf (pEP1_RAM_Addr)
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#define pEP1_IN_DataBuf (pEP1_RAM_Addr+64)
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#define pEP2_OUT_DataBuf (pEP2_RAM_Addr)
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#define pEP2_IN_DataBuf (pEP2_RAM_Addr+64)
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/******************************************************************************/
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/* <20>˵<EFBFBD>״̬<D7B4><CCAC>ȡ<EFBFBD>궨<EFBFBD><EAB6A8> */
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#define EP1_GetINSta() (R8_UEP1_CTRL&UEP_T_RES_NAK)
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#define EP2_GetINSta() (R8_UEP2_CTRL&UEP_T_RES_NAK)
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#define EP3_GetINSta() (R8_UEP3_CTRL&UEP_T_RES_NAK)
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/******************************************************************************/
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/* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> */
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extern UINT8 EP0_DatabufHD[8]; //ep0(64)
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extern UINT8 EP1_DatabufHD[64+64]; //ep1_out(64)+ep1_in(64)
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extern UINT8 EP2_DatabufHD[64+64]; //ep2_out(64)+ep2_in(64) <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>˵<EFBFBD>
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extern void DevEP2_IN_Deal( UINT8 l );
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extern void USBOTG_RCC_Init( void );
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extern void USBDeviceInit( void );
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#endif
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