initial commit
This commit is contained in:
265
project/src/at32f425_int.c
Normal file
265
project/src/at32f425_int.c
Normal file
@@ -0,0 +1,265 @@
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||||
/* add user code begin Header */
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||||
/**
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||||
**************************************************************************
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* @file at32f425_int.c
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* @brief main interrupt service routines.
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**************************************************************************
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||||
* Copyright notice & Disclaimer
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||||
*
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||||
* The software Board Support Package (BSP) that is made available to
|
||||
* download from Artery official website is the copyrighted work of Artery.
|
||||
* Artery authorizes customers to use, copy, and distribute the BSP
|
||||
* software and its related documentation for the purpose of design and
|
||||
* development in conjunction with Artery microcontrollers. Use of the
|
||||
* software is governed by this copyright notice and the following disclaimer.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES,
|
||||
* GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS,
|
||||
* TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR
|
||||
* STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS,
|
||||
* INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.
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||||
*
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||||
**************************************************************************
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*/
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/* add user code end Header */
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||||
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||||
/* includes ------------------------------------------------------------------*/
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#include "at32f425_int.h"
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/* private includes ----------------------------------------------------------*/
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/* add user code begin private includes */
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#include "by_debug.h"
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#include "by_motion.h"
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/* add user code end private includes */
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/* private typedef -----------------------------------------------------------*/
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||||
/* add user code begin private typedef */
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||||
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||||
/* add user code end private typedef */
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||||
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||||
/* private define ------------------------------------------------------------*/
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||||
/* add user code begin private define */
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||||
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||||
/* add user code end private define */
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||||
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/* private macro -------------------------------------------------------------*/
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||||
/* add user code begin private macro */
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||||
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||||
/* add user code end private macro */
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||||
|
||||
/* private variables ---------------------------------------------------------*/
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||||
/* add user code begin private variables */
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||||
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||||
/* add user code end private variables */
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||||
|
||||
/* private function prototypes --------------------------------------------*/
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||||
/* add user code begin function prototypes */
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||||
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||||
/* add user code end function prototypes */
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||||
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||||
/* private user code ---------------------------------------------------------*/
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||||
/* add user code begin 0 */
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||||
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||||
/* add user code end 0 */
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||||
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||||
/* external variables ---------------------------------------------------------*/
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||||
/* add user code begin external variables */
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||||
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||||
/* add user code end external variables */
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||||
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||||
/**
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* @brief this function handles nmi exception.
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* @param none
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* @retval none
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*/
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void NMI_Handler(void)
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{
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/* add user code begin NonMaskableInt_IRQ 0 */
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/* add user code end NonMaskableInt_IRQ 0 */
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/* add user code begin NonMaskableInt_IRQ 1 */
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/* add user code end NonMaskableInt_IRQ 1 */
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}
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/**
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* @brief this function handles hard fault exception.
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* @param none
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* @retval none
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*/
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void HardFault_Handler(void)
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{
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/* add user code begin HardFault_IRQ 0 */
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/* add user code end HardFault_IRQ 0 */
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/* go to infinite loop when hard fault exception occurs */
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while (1)
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{
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/* add user code begin W1_HardFault_IRQ 0 */
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/* add user code end W1_HardFault_IRQ 0 */
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}
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}
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/**
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* @brief this function handles memory manage exception.
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* @param none
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* @retval none
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*/
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void MemManage_Handler(void)
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{
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/* add user code begin MemoryManagement_IRQ 0 */
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/* add user code end MemoryManagement_IRQ 0 */
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/* go to infinite loop when memory manage exception occurs */
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while (1)
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{
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/* add user code begin W1_MemoryManagement_IRQ 0 */
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/* add user code end W1_MemoryManagement_IRQ 0 */
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}
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}
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/**
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* @brief this function handles bus fault exception.
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* @param none
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* @retval none
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*/
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void BusFault_Handler(void)
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{
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/* add user code begin BusFault_IRQ 0 */
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/* add user code end BusFault_IRQ 0 */
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/* go to infinite loop when bus fault exception occurs */
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while (1)
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{
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/* add user code begin W1_BusFault_IRQ 0 */
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/* add user code end W1_BusFault_IRQ 0 */
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}
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}
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/**
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* @brief this function handles usage fault exception.
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* @param none
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* @retval none
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*/
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void UsageFault_Handler(void)
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{
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/* add user code begin UsageFault_IRQ 0 */
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/* add user code end UsageFault_IRQ 0 */
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/* go to infinite loop when usage fault exception occurs */
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while (1)
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{
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/* add user code begin W1_UsageFault_IRQ 0 */
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/* add user code end W1_UsageFault_IRQ 0 */
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}
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}
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/**
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* @brief this function handles svcall exception.
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* @param none
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* @retval none
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*/
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void SVC_Handler(void)
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{
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/* add user code begin SVCall_IRQ 0 */
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/* add user code end SVCall_IRQ 0 */
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/* add user code begin SVCall_IRQ 1 */
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/* add user code end SVCall_IRQ 1 */
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}
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/**
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* @brief this function handles debug monitor exception.
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* @param none
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* @retval none
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*/
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void DebugMon_Handler(void)
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{
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/* add user code begin DebugMonitor_IRQ 0 */
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/* add user code end DebugMonitor_IRQ 0 */
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/* add user code begin DebugMonitor_IRQ 1 */
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/* add user code end DebugMonitor_IRQ 1 */
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}
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/**
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* @brief this function handles pendsv_handler exception.
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* @param none
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* @retval none
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*/
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void PendSV_Handler(void)
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{
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/* add user code begin PendSV_IRQ 0 */
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/* add user code end PendSV_IRQ 0 */
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/* add user code begin PendSV_IRQ 1 */
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/* add user code end PendSV_IRQ 1 */
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}
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/**
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* @brief this function handles TMR6 handler.
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* @param none
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* @retval none
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*/
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void TMR6_GLOBAL_IRQHandler(void)
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{
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/* add user code begin TMR6_GLOBAL_IRQ 0 */
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if (SET == tmr_interrupt_flag_get(TMR6, TMR_OVF_FLAG)) {
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by_motion_run();
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tmr_flag_clear(TMR6, TMR_OVF_FLAG);
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}
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/* add user code end TMR6_GLOBAL_IRQ 0 */
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/* add user code begin TMR6_GLOBAL_IRQ 1 */
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||||
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/* add user code end TMR6_GLOBAL_IRQ 1 */
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}
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/**
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* @brief this function handles TMR7 handler.
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* @param none
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* @retval none
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*/
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void TMR7_GLOBAL_IRQHandler(void)
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{
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/* add user code begin TMR7_GLOBAL_IRQ 0 */
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/* add user code end TMR7_GLOBAL_IRQ 0 */
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/* add user code begin TMR7_GLOBAL_IRQ 1 */
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||||
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/* add user code end TMR7_GLOBAL_IRQ 1 */
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}
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/**
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* @brief this function handles CAN1 handler.
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* @param none
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* @retval none
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*/
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void CAN1_IRQHandler(void)
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{
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/* add user code begin CAN1_IRQ 0 */
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if (SET == can_flag_get(CAN1, CAN_RF0MN_FLAG)) {
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can_rx_message_type can_rx_message;
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can_message_receive(CAN1, CAN_RX_FIFO0, &can_rx_message);
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by_motion_can_handle((uint16_t)can_rx_message.standard_id, can_rx_message.data, can_rx_message.dlc);
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can_flag_clear(CAN1, CAN_RF0MN_FLAG);
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}
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/* add user code end CAN1_IRQ 0 */
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/* add user code begin CAN1_IRQ 1 */
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/* add user code end CAN1_IRQ 1 */
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}
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/* add user code begin 1 */
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/* add user code end 1 */
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752
project/src/at32f425_wk_config.c
Normal file
752
project/src/at32f425_wk_config.c
Normal file
@@ -0,0 +1,752 @@
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/* add user code begin Header */
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||||
/**
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||||
**************************************************************************
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||||
* @file at32f425_wk_config.c
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* @brief work bench config program
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**************************************************************************
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||||
* Copyright notice & Disclaimer
|
||||
*
|
||||
* The software Board Support Package (BSP) that is made available to
|
||||
* download from Artery official website is the copyrighted work of Artery.
|
||||
* Artery authorizes customers to use, copy, and distribute the BSP
|
||||
* software and its related documentation for the purpose of design and
|
||||
* development in conjunction with Artery microcontrollers. Use of the
|
||||
* software is governed by this copyright notice and the following disclaimer.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES,
|
||||
* GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS,
|
||||
* TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR
|
||||
* STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS,
|
||||
* INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.
|
||||
*
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||||
**************************************************************************
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||||
*/
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||||
/* add user code end Header */
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||||
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||||
#include "at32f425_wk_config.h"
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||||
/* private includes ----------------------------------------------------------*/
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||||
/* add user code begin private includes */
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||||
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||||
/* add user code end private includes */
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||||
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||||
/* private typedef -----------------------------------------------------------*/
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||||
/* add user code begin private typedef */
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||||
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||||
/* add user code end private typedef */
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||||
|
||||
/* private define ------------------------------------------------------------*/
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||||
/* add user code begin private define */
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||||
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||||
/* add user code end private define */
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||||
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||||
/* private macro -------------------------------------------------------------*/
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||||
/* add user code begin private macro */
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||||
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||||
/* add user code end private macro */
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||||
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||||
/* private variables ---------------------------------------------------------*/
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||||
/* add user code begin private variables */
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||||
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||||
/* add user code end private variables */
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||||
|
||||
/* private function prototypes --------------------------------------------*/
|
||||
/* add user code begin function prototypes */
|
||||
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||||
/* add user code end function prototypes */
|
||||
|
||||
/* private user code ---------------------------------------------------------*/
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||||
/* add user code begin 0 */
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||||
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||||
/* add user code end 0 */
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||||
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/**
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* @brief system clock config program
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* @note the system clock is configured as follow:
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* system clock (sclk) = hext * pll_mult
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* system clock source = HEXT_VALUE
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* - hext = HEXT_VALUE
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* - sclk = 96000000
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* - ahbdiv = 1
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* - ahbclk = 96000000
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||||
* - apb1div = 1
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* - apb1clk = 96000000
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||||
* - apb2div = 1
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||||
* - apb2clk = 96000000
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||||
* - pll_mult = 6
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||||
* - flash_wtcyc = 2 cycle
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||||
* @param none
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||||
* @retval none
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||||
*/
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||||
void wk_system_clock_config(void)
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||||
{
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||||
/* reset crm */
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||||
crm_reset();
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||||
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/* config flash psr register */
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||||
flash_psr_set(FLASH_WAIT_CYCLE_2);
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||||
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||||
/* enable lick */
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||||
crm_clock_source_enable(CRM_CLOCK_SOURCE_LICK, TRUE);
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||||
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||||
/* wait till lick is ready */
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||||
while(crm_flag_get(CRM_LICK_STABLE_FLAG) != SET)
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||||
{
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||||
}
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||||
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||||
/* enable hext */
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||||
crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
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||||
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||||
/* wait till hext is ready */
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||||
while(crm_hext_stable_wait() == ERROR)
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||||
{
|
||||
}
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||||
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||||
/* enable hick */
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||||
crm_clock_source_enable(CRM_CLOCK_SOURCE_HICK, TRUE);
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||||
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||||
/* wait till hick is ready */
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||||
while(crm_flag_get(CRM_HICK_STABLE_FLAG) != SET)
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||||
{
|
||||
}
|
||||
|
||||
/* config pll clock resource */
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||||
crm_pll_config(CRM_PLL_SOURCE_HEXT, CRM_PLL_MULT_6);
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||||
|
||||
/* enable pll */
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||||
crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
|
||||
|
||||
/* wait till pll is ready */
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||||
while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
|
||||
{
|
||||
}
|
||||
|
||||
/* config ahbclk */
|
||||
crm_ahb_div_set(CRM_AHB_DIV_1);
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||||
|
||||
/* config apb2clk */
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||||
crm_apb2_div_set(CRM_APB2_DIV_1);
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||||
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||||
/* config apb1clk */
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||||
crm_apb1_div_set(CRM_APB1_DIV_1);
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||||
|
||||
/* select pll as system clock source */
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||||
crm_sysclk_switch(CRM_SCLK_PLL);
|
||||
|
||||
/* wait till pll is used as system clock source */
|
||||
while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
|
||||
{
|
||||
}
|
||||
|
||||
/* update system_core_clock global variable */
|
||||
system_core_clock_update();
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief config periph clock
|
||||
* @param none
|
||||
* @retval none
|
||||
*/
|
||||
void wk_periph_clock_config(void)
|
||||
{
|
||||
/* enable gpioa periph clock */
|
||||
crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE);
|
||||
|
||||
/* enable gpiob periph clock */
|
||||
crm_periph_clock_enable(CRM_GPIOB_PERIPH_CLOCK, TRUE);
|
||||
|
||||
/* enable gpiof periph clock */
|
||||
crm_periph_clock_enable(CRM_GPIOF_PERIPH_CLOCK, TRUE);
|
||||
|
||||
/* enable tmr1 periph clock */
|
||||
crm_periph_clock_enable(CRM_TMR1_PERIPH_CLOCK, TRUE);
|
||||
|
||||
/* enable usart1 periph clock */
|
||||
crm_periph_clock_enable(CRM_USART1_PERIPH_CLOCK, TRUE);
|
||||
|
||||
/* enable tmr2 periph clock */
|
||||
crm_periph_clock_enable(CRM_TMR2_PERIPH_CLOCK, TRUE);
|
||||
|
||||
/* enable tmr3 periph clock */
|
||||
crm_periph_clock_enable(CRM_TMR3_PERIPH_CLOCK, TRUE);
|
||||
|
||||
/* enable tmr6 periph clock */
|
||||
crm_periph_clock_enable(CRM_TMR6_PERIPH_CLOCK, TRUE);
|
||||
|
||||
/* enable tmr7 periph clock */
|
||||
crm_periph_clock_enable(CRM_TMR7_PERIPH_CLOCK, TRUE);
|
||||
|
||||
/* enable can1 periph clock */
|
||||
crm_periph_clock_enable(CRM_CAN1_PERIPH_CLOCK, TRUE);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief nvic config
|
||||
* @param none
|
||||
* @retval none
|
||||
*/
|
||||
void wk_nvic_config(void)
|
||||
{
|
||||
nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
|
||||
|
||||
nvic_irq_enable(TMR6_GLOBAL_IRQn, 0, 0);
|
||||
nvic_irq_enable(TMR7_GLOBAL_IRQn, 0, 0);
|
||||
nvic_irq_enable(CAN1_IRQn, 0, 0);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief init gpio_input/gpio_output/gpio_analog/eventout function.
|
||||
* @param none
|
||||
* @retval none
|
||||
*/
|
||||
void wk_gpio_config(void)
|
||||
{
|
||||
/* add user code begin gpio_config 0 */
|
||||
|
||||
/* add user code end gpio_config 0 */
|
||||
|
||||
gpio_init_type gpio_init_struct;
|
||||
gpio_default_para_init(&gpio_init_struct);
|
||||
|
||||
/* add user code begin gpio_config 1 */
|
||||
|
||||
/* add user code end gpio_config 1 */
|
||||
|
||||
/* gpio input config */
|
||||
gpio_init_struct.gpio_mode = GPIO_MODE_INPUT;
|
||||
gpio_init_struct.gpio_pins = GPIO_PINS_4 | GPIO_PINS_5;
|
||||
gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
|
||||
gpio_init(GPIOB, &gpio_init_struct);
|
||||
|
||||
/* gpio output config */
|
||||
gpio_bits_reset(GPIOA, GPIO_PINS_12);
|
||||
|
||||
gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_MODERATE;
|
||||
gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
|
||||
gpio_init_struct.gpio_mode = GPIO_MODE_OUTPUT;
|
||||
gpio_init_struct.gpio_pins = GPIO_PINS_12;
|
||||
gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
|
||||
gpio_init(GPIOA, &gpio_init_struct);
|
||||
|
||||
/* add user code begin gpio_config 2 */
|
||||
|
||||
/* add user code end gpio_config 2 */
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief init tmr1 function.
|
||||
* @param none
|
||||
* @retval none
|
||||
*/
|
||||
void wk_tmr1_init(void)
|
||||
{
|
||||
/* add user code begin tmr1_init 0 */
|
||||
|
||||
/* add user code end tmr1_init 0 */
|
||||
|
||||
gpio_init_type gpio_init_struct;
|
||||
tmr_output_config_type tmr_output_struct;
|
||||
tmr_brkdt_config_type tmr_brkdt_struct;
|
||||
|
||||
gpio_default_para_init(&gpio_init_struct);
|
||||
|
||||
/* add user code begin tmr1_init 1 */
|
||||
|
||||
/* add user code end tmr1_init 1 */
|
||||
|
||||
/* configure the tmr1 CH1 pin */
|
||||
gpio_init_struct.gpio_pins = GPIO_PINS_8;
|
||||
gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
|
||||
gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
|
||||
gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
|
||||
gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_MODERATE;
|
||||
gpio_init(GPIOA, &gpio_init_struct);
|
||||
|
||||
gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE8, GPIO_MUX_2);
|
||||
|
||||
/* configure the tmr1 CH2 pin */
|
||||
gpio_init_struct.gpio_pins = GPIO_PINS_9;
|
||||
gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
|
||||
gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
|
||||
gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
|
||||
gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_MODERATE;
|
||||
gpio_init(GPIOA, &gpio_init_struct);
|
||||
|
||||
gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE9, GPIO_MUX_2);
|
||||
|
||||
/* configure the tmr1 CH3 pin */
|
||||
gpio_init_struct.gpio_pins = GPIO_PINS_10;
|
||||
gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
|
||||
gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
|
||||
gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
|
||||
gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_MODERATE;
|
||||
gpio_init(GPIOA, &gpio_init_struct);
|
||||
|
||||
gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE10, GPIO_MUX_2);
|
||||
|
||||
/* configure the tmr1 CH4 pin */
|
||||
gpio_init_struct.gpio_pins = GPIO_PINS_11;
|
||||
gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
|
||||
gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
|
||||
gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
|
||||
gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_MODERATE;
|
||||
gpio_init(GPIOA, &gpio_init_struct);
|
||||
|
||||
gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE11, GPIO_MUX_2);
|
||||
|
||||
/* configure counter settings */
|
||||
tmr_base_init(TMR1, 999, 239);
|
||||
tmr_cnt_dir_set(TMR1, TMR_COUNT_UP);
|
||||
tmr_clock_source_div_set(TMR1, TMR_CLOCK_DIV1);
|
||||
tmr_repetition_counter_set(TMR1, 0);
|
||||
tmr_period_buffer_enable(TMR1, FALSE);
|
||||
|
||||
/* configure primary mode settings */
|
||||
tmr_sub_sync_mode_set(TMR1, FALSE);
|
||||
tmr_primary_mode_select(TMR1, TMR_PRIMARY_SEL_RESET);
|
||||
|
||||
/* configure channel 1 output settings */
|
||||
tmr_output_struct.oc_mode = TMR_OUTPUT_CONTROL_PWM_MODE_A;
|
||||
tmr_output_struct.oc_output_state = TRUE;
|
||||
tmr_output_struct.occ_output_state = FALSE;
|
||||
tmr_output_struct.oc_polarity = TMR_OUTPUT_ACTIVE_HIGH;
|
||||
tmr_output_struct.occ_polarity = TMR_OUTPUT_ACTIVE_HIGH;
|
||||
tmr_output_struct.oc_idle_state = FALSE;
|
||||
tmr_output_struct.occ_idle_state = FALSE;
|
||||
tmr_output_channel_config(TMR1, TMR_SELECT_CHANNEL_1, &tmr_output_struct);
|
||||
tmr_channel_value_set(TMR1, TMR_SELECT_CHANNEL_1, 0);
|
||||
tmr_output_channel_buffer_enable(TMR1, TMR_SELECT_CHANNEL_1, FALSE);
|
||||
|
||||
tmr_output_channel_immediately_set(TMR1, TMR_SELECT_CHANNEL_1, FALSE);
|
||||
|
||||
/* configure channel 2 output settings */
|
||||
tmr_output_struct.oc_mode = TMR_OUTPUT_CONTROL_PWM_MODE_A;
|
||||
tmr_output_struct.oc_output_state = TRUE;
|
||||
tmr_output_struct.occ_output_state = FALSE;
|
||||
tmr_output_struct.oc_polarity = TMR_OUTPUT_ACTIVE_HIGH;
|
||||
tmr_output_struct.occ_polarity = TMR_OUTPUT_ACTIVE_HIGH;
|
||||
tmr_output_struct.oc_idle_state = FALSE;
|
||||
tmr_output_struct.occ_idle_state = FALSE;
|
||||
tmr_output_channel_config(TMR1, TMR_SELECT_CHANNEL_2, &tmr_output_struct);
|
||||
tmr_channel_value_set(TMR1, TMR_SELECT_CHANNEL_2, 0);
|
||||
tmr_output_channel_buffer_enable(TMR1, TMR_SELECT_CHANNEL_2, FALSE);
|
||||
|
||||
tmr_output_channel_immediately_set(TMR1, TMR_SELECT_CHANNEL_2, FALSE);
|
||||
|
||||
/* configure channel 3 output settings */
|
||||
tmr_output_struct.oc_mode = TMR_OUTPUT_CONTROL_PWM_MODE_A;
|
||||
tmr_output_struct.oc_output_state = TRUE;
|
||||
tmr_output_struct.occ_output_state = FALSE;
|
||||
tmr_output_struct.oc_polarity = TMR_OUTPUT_ACTIVE_HIGH;
|
||||
tmr_output_struct.occ_polarity = TMR_OUTPUT_ACTIVE_HIGH;
|
||||
tmr_output_struct.oc_idle_state = FALSE;
|
||||
tmr_output_struct.occ_idle_state = FALSE;
|
||||
tmr_output_channel_config(TMR1, TMR_SELECT_CHANNEL_3, &tmr_output_struct);
|
||||
tmr_channel_value_set(TMR1, TMR_SELECT_CHANNEL_3, 0);
|
||||
tmr_output_channel_buffer_enable(TMR1, TMR_SELECT_CHANNEL_3, FALSE);
|
||||
|
||||
tmr_output_channel_immediately_set(TMR1, TMR_SELECT_CHANNEL_3, FALSE);
|
||||
|
||||
/* configure channel 4 output settings */
|
||||
tmr_output_struct.oc_mode = TMR_OUTPUT_CONTROL_PWM_MODE_A;
|
||||
tmr_output_struct.oc_output_state = TRUE;
|
||||
tmr_output_struct.occ_output_state = FALSE;
|
||||
tmr_output_struct.oc_polarity = TMR_OUTPUT_ACTIVE_HIGH;
|
||||
tmr_output_struct.occ_polarity = TMR_OUTPUT_ACTIVE_HIGH;
|
||||
tmr_output_struct.oc_idle_state = FALSE;
|
||||
tmr_output_struct.occ_idle_state = FALSE;
|
||||
tmr_output_channel_config(TMR1, TMR_SELECT_CHANNEL_4, &tmr_output_struct);
|
||||
tmr_channel_value_set(TMR1, TMR_SELECT_CHANNEL_4, 0);
|
||||
tmr_output_channel_buffer_enable(TMR1, TMR_SELECT_CHANNEL_4, FALSE);
|
||||
|
||||
tmr_output_channel_immediately_set(TMR1, TMR_SELECT_CHANNEL_4, FALSE);
|
||||
|
||||
/* configure break and dead-time settings */
|
||||
tmr_brkdt_struct.brk_enable = FALSE;
|
||||
tmr_brkdt_struct.auto_output_enable = FALSE;
|
||||
tmr_brkdt_struct.brk_polarity = TMR_BRK_INPUT_ACTIVE_LOW;
|
||||
tmr_brkdt_struct.fcsoen_state = FALSE;
|
||||
tmr_brkdt_struct.fcsodis_state = FALSE;
|
||||
tmr_brkdt_struct.wp_level = TMR_WP_OFF;
|
||||
tmr_brkdt_struct.deadtime = 0;
|
||||
tmr_brkdt_config(TMR1, &tmr_brkdt_struct);
|
||||
|
||||
tmr_brk_filter_value_set(TMR1, 0);
|
||||
|
||||
|
||||
tmr_output_enable(TMR1, TRUE);
|
||||
|
||||
tmr_counter_enable(TMR1, TRUE);
|
||||
|
||||
/* add user code begin tmr1_init 2 */
|
||||
|
||||
/* add user code end tmr1_init 2 */
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief init tmr2 function.
|
||||
* @param none
|
||||
* @retval none
|
||||
*/
|
||||
void wk_tmr2_init(void)
|
||||
{
|
||||
/* add user code begin tmr2_init 0 */
|
||||
|
||||
/* add user code end tmr2_init 0 */
|
||||
|
||||
gpio_init_type gpio_init_struct;
|
||||
tmr_input_config_type tmr_input_struct;
|
||||
|
||||
gpio_default_para_init(&gpio_init_struct);
|
||||
|
||||
/* add user code begin tmr2_init 1 */
|
||||
|
||||
/* add user code end tmr2_init 1 */
|
||||
|
||||
/* configure the tmr2 CH1 pin */
|
||||
gpio_init_struct.gpio_pins = GPIO_PINS_0;
|
||||
gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
|
||||
gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
|
||||
gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
|
||||
gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_MODERATE;
|
||||
gpio_init(GPIOA, &gpio_init_struct);
|
||||
|
||||
gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE0, GPIO_MUX_2);
|
||||
|
||||
/* configure the tmr2 CH2 pin */
|
||||
gpio_init_struct.gpio_pins = GPIO_PINS_1;
|
||||
gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
|
||||
gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
|
||||
gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
|
||||
gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_MODERATE;
|
||||
gpio_init(GPIOA, &gpio_init_struct);
|
||||
|
||||
gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE1, GPIO_MUX_2);
|
||||
|
||||
/* configure counter settings */
|
||||
tmr_base_init(TMR2, 65535, 0);
|
||||
tmr_cnt_dir_set(TMR2, TMR_COUNT_UP);
|
||||
tmr_clock_source_div_set(TMR2, TMR_CLOCK_DIV1);
|
||||
tmr_period_buffer_enable(TMR2, FALSE);
|
||||
|
||||
/* configure primary mode settings */
|
||||
tmr_sub_sync_mode_set(TMR2, FALSE);
|
||||
tmr_primary_mode_select(TMR2, TMR_PRIMARY_SEL_RESET);
|
||||
|
||||
/* configure encoder mode */
|
||||
tmr_input_struct.input_channel_select = TMR_SELECT_CHANNEL_1;
|
||||
tmr_input_struct.input_mapped_select = TMR_CC_CHANNEL_MAPPED_DIRECT;
|
||||
tmr_input_struct.input_polarity_select = TMR_INPUT_RISING_EDGE;
|
||||
tmr_input_struct.input_filter_value = 0;
|
||||
tmr_input_channel_init(TMR2, &tmr_input_struct, TMR_CHANNEL_INPUT_DIV_1);
|
||||
|
||||
tmr_input_struct.input_channel_select = TMR_SELECT_CHANNEL_2;
|
||||
tmr_input_struct.input_mapped_select = TMR_CC_CHANNEL_MAPPED_DIRECT;
|
||||
tmr_input_struct.input_polarity_select = TMR_INPUT_RISING_EDGE;
|
||||
tmr_input_struct.input_filter_value = 0;
|
||||
tmr_input_channel_init(TMR2, &tmr_input_struct, TMR_CHANNEL_INPUT_DIV_1);
|
||||
|
||||
tmr_encoder_mode_config(TMR2, TMR_ENCODER_MODE_A, TMR_INPUT_RISING_EDGE, TMR_INPUT_RISING_EDGE);
|
||||
|
||||
tmr_counter_enable(TMR2, TRUE);
|
||||
|
||||
/* add user code begin tmr2_init 2 */
|
||||
|
||||
/* add user code end tmr2_init 2 */
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief init tmr3 function.
|
||||
* @param none
|
||||
* @retval none
|
||||
*/
|
||||
void wk_tmr3_init(void)
|
||||
{
|
||||
/* add user code begin tmr3_init 0 */
|
||||
|
||||
/* add user code end tmr3_init 0 */
|
||||
|
||||
gpio_init_type gpio_init_struct;
|
||||
tmr_input_config_type tmr_input_struct;
|
||||
|
||||
gpio_default_para_init(&gpio_init_struct);
|
||||
|
||||
/* add user code begin tmr3_init 1 */
|
||||
|
||||
/* add user code end tmr3_init 1 */
|
||||
|
||||
/* configure the tmr3 CH1 pin */
|
||||
gpio_init_struct.gpio_pins = GPIO_PINS_6;
|
||||
gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
|
||||
gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
|
||||
gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
|
||||
gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_MODERATE;
|
||||
gpio_init(GPIOA, &gpio_init_struct);
|
||||
|
||||
gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE6, GPIO_MUX_1);
|
||||
|
||||
/* configure the tmr3 CH2 pin */
|
||||
gpio_init_struct.gpio_pins = GPIO_PINS_7;
|
||||
gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
|
||||
gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
|
||||
gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
|
||||
gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_MODERATE;
|
||||
gpio_init(GPIOA, &gpio_init_struct);
|
||||
|
||||
gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE7, GPIO_MUX_1);
|
||||
|
||||
/* configure counter settings */
|
||||
tmr_base_init(TMR3, 65535, 0);
|
||||
tmr_cnt_dir_set(TMR3, TMR_COUNT_UP);
|
||||
tmr_clock_source_div_set(TMR3, TMR_CLOCK_DIV1);
|
||||
tmr_period_buffer_enable(TMR3, FALSE);
|
||||
|
||||
/* configure primary mode settings */
|
||||
tmr_sub_sync_mode_set(TMR3, FALSE);
|
||||
tmr_primary_mode_select(TMR3, TMR_PRIMARY_SEL_RESET);
|
||||
|
||||
/* configure encoder mode */
|
||||
tmr_input_struct.input_channel_select = TMR_SELECT_CHANNEL_1;
|
||||
tmr_input_struct.input_mapped_select = TMR_CC_CHANNEL_MAPPED_DIRECT;
|
||||
tmr_input_struct.input_polarity_select = TMR_INPUT_RISING_EDGE;
|
||||
tmr_input_struct.input_filter_value = 0;
|
||||
tmr_input_channel_init(TMR3, &tmr_input_struct, TMR_CHANNEL_INPUT_DIV_1);
|
||||
|
||||
tmr_input_struct.input_channel_select = TMR_SELECT_CHANNEL_2;
|
||||
tmr_input_struct.input_mapped_select = TMR_CC_CHANNEL_MAPPED_DIRECT;
|
||||
tmr_input_struct.input_polarity_select = TMR_INPUT_RISING_EDGE;
|
||||
tmr_input_struct.input_filter_value = 0;
|
||||
tmr_input_channel_init(TMR3, &tmr_input_struct, TMR_CHANNEL_INPUT_DIV_1);
|
||||
|
||||
tmr_encoder_mode_config(TMR3, TMR_ENCODER_MODE_A, TMR_INPUT_RISING_EDGE, TMR_INPUT_RISING_EDGE);
|
||||
|
||||
tmr_counter_enable(TMR3, TRUE);
|
||||
|
||||
/* add user code begin tmr3_init 2 */
|
||||
|
||||
/* add user code end tmr3_init 2 */
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief init tmr6 function.
|
||||
* @param none
|
||||
* @retval none
|
||||
*/
|
||||
void wk_tmr6_init(void)
|
||||
{
|
||||
/* add user code begin tmr6_init 0 */
|
||||
|
||||
/* add user code end tmr6_init 0 */
|
||||
|
||||
/* add user code begin tmr6_init 1 */
|
||||
|
||||
/* add user code end tmr6_init 1 */
|
||||
|
||||
/* configure counter settings */
|
||||
tmr_base_init(TMR6, 1999, 959);
|
||||
tmr_cnt_dir_set(TMR6, TMR_COUNT_UP);
|
||||
tmr_period_buffer_enable(TMR6, FALSE);
|
||||
|
||||
/* configure primary mode settings */
|
||||
tmr_primary_mode_select(TMR6, TMR_PRIMARY_SEL_RESET);
|
||||
|
||||
tmr_counter_enable(TMR6, TRUE);
|
||||
|
||||
/**
|
||||
* Users need to configure TMR6 interrupt functions according to the actual application.
|
||||
* 1. Call the below function to enable the corresponding TMR6 interrupt.
|
||||
* --tmr_interrupt_enable(...)
|
||||
* 2. Add the user's interrupt handler code into the below function in the at32f425_int.c file.
|
||||
* --void TMR6_GLOBAL_IRQHandler(void)
|
||||
*/
|
||||
|
||||
/* add user code begin tmr6_init 2 */
|
||||
tmr_interrupt_enable(TMR6, TMR_OVF_INT, TRUE);
|
||||
/* add user code end tmr6_init 2 */
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief init tmr7 function.
|
||||
* @param none
|
||||
* @retval none
|
||||
*/
|
||||
void wk_tmr7_init(void)
|
||||
{
|
||||
/* add user code begin tmr7_init 0 */
|
||||
|
||||
/* add user code end tmr7_init 0 */
|
||||
|
||||
/* add user code begin tmr7_init 1 */
|
||||
|
||||
/* add user code end tmr7_init 1 */
|
||||
|
||||
/* configure counter settings */
|
||||
tmr_base_init(TMR7, 99, 19199);
|
||||
tmr_cnt_dir_set(TMR7, TMR_COUNT_UP);
|
||||
tmr_period_buffer_enable(TMR7, FALSE);
|
||||
|
||||
/* configure primary mode settings */
|
||||
tmr_primary_mode_select(TMR7, TMR_PRIMARY_SEL_RESET);
|
||||
|
||||
tmr_counter_enable(TMR7, TRUE);
|
||||
|
||||
/**
|
||||
* Users need to configure TMR7 interrupt functions according to the actual application.
|
||||
* 1. Call the below function to enable the corresponding TMR7 interrupt.
|
||||
* --tmr_interrupt_enable(...)
|
||||
* 2. Add the user's interrupt handler code into the below function in the at32f425_int.c file.
|
||||
* --void TMR7_GLOBAL_IRQHandler(void)
|
||||
*/
|
||||
|
||||
/* add user code begin tmr7_init 2 */
|
||||
|
||||
/* add user code end tmr7_init 2 */
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief init usart1 function
|
||||
* @param none
|
||||
* @retval none
|
||||
*/
|
||||
void wk_usart1_init(void)
|
||||
{
|
||||
/* add user code begin usart1_init 0 */
|
||||
|
||||
/* add user code end usart1_init 0 */
|
||||
|
||||
gpio_init_type gpio_init_struct;
|
||||
gpio_default_para_init(&gpio_init_struct);
|
||||
|
||||
/* add user code begin usart1_init 1 */
|
||||
|
||||
/* add user code end usart1_init 1 */
|
||||
|
||||
/* configure the TX pin */
|
||||
gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_MODERATE;
|
||||
gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
|
||||
gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
|
||||
gpio_init_struct.gpio_pins = GPIO_PINS_6;
|
||||
gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
|
||||
gpio_init(GPIOB, &gpio_init_struct);
|
||||
|
||||
gpio_pin_mux_config(GPIOB, GPIO_PINS_SOURCE6, GPIO_MUX_0);
|
||||
|
||||
/* configure the RX pin */
|
||||
gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_MODERATE;
|
||||
gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
|
||||
gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
|
||||
gpio_init_struct.gpio_pins = GPIO_PINS_7;
|
||||
gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
|
||||
gpio_init(GPIOB, &gpio_init_struct);
|
||||
|
||||
gpio_pin_mux_config(GPIOB, GPIO_PINS_SOURCE7, GPIO_MUX_0);
|
||||
|
||||
/* configure param */
|
||||
usart_init(USART1, 115200, USART_DATA_8BITS, USART_STOP_1_BIT);
|
||||
usart_transmitter_enable(USART1, TRUE);
|
||||
usart_receiver_enable(USART1, TRUE);
|
||||
usart_parity_selection_config(USART1, USART_PARITY_NONE);
|
||||
|
||||
usart_hardware_flow_control_set(USART1, USART_HARDWARE_FLOW_NONE);
|
||||
|
||||
usart_enable(USART1, TRUE);
|
||||
|
||||
/* add user code begin usart1_init 2 */
|
||||
|
||||
/* add user code end usart1_init 2 */
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief init can1 function.
|
||||
* @param none
|
||||
* @retval none
|
||||
*/
|
||||
void wk_can1_init(void)
|
||||
{
|
||||
/* add user code begin can1_init 0 */
|
||||
|
||||
/* add user code end can1_init 0 */
|
||||
|
||||
gpio_init_type gpio_init_struct;
|
||||
can_base_type can_base_struct;
|
||||
can_baudrate_type can_baudrate_struct;
|
||||
can_filter_init_type can_filter_init_struct;
|
||||
|
||||
/* add user code begin can1_init 1 */
|
||||
|
||||
/* add user code end can1_init 1 */
|
||||
|
||||
/*gpio-----------------------------------------------------------------------------*/
|
||||
gpio_default_para_init(&gpio_init_struct);
|
||||
|
||||
/* configure the CAN1 TX pin */
|
||||
gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_MODERATE;
|
||||
gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
|
||||
gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
|
||||
gpio_init_struct.gpio_pins = GPIO_PINS_3;
|
||||
gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
|
||||
gpio_init(GPIOA, &gpio_init_struct);
|
||||
|
||||
gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE3, GPIO_MUX_4);
|
||||
|
||||
/* configure the CAN1 RX pin */
|
||||
gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_MODERATE;
|
||||
gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
|
||||
gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
|
||||
gpio_init_struct.gpio_pins = GPIO_PINS_2;
|
||||
gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
|
||||
gpio_init(GPIOA, &gpio_init_struct);
|
||||
|
||||
gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE2, GPIO_MUX_4);
|
||||
|
||||
/*can_base_init--------------------------------------------------------------------*/
|
||||
can_default_para_init(&can_base_struct);
|
||||
can_base_struct.mode_selection = CAN_MODE_COMMUNICATE;
|
||||
can_base_struct.ttc_enable = FALSE;
|
||||
can_base_struct.aebo_enable = TRUE;
|
||||
can_base_struct.aed_enable = TRUE;
|
||||
can_base_struct.prsf_enable = FALSE;
|
||||
can_base_struct.mdrsel_selection = CAN_DISCARDING_FIRST_RECEIVED;
|
||||
can_base_struct.mmssr_selection = CAN_SENDING_BY_ID;
|
||||
|
||||
can_base_init(CAN1, &can_base_struct);
|
||||
|
||||
/*can_baudrate_setting-------------------------------------------------------------*/
|
||||
/*set baudrate = pclk/(baudrate_div *(1 + bts1_size + bts2_size))------------------*/
|
||||
can_baudrate_struct.baudrate_div = 24; /*value: 1~0xFFF*/
|
||||
can_baudrate_struct.rsaw_size = CAN_RSAW_1TQ; /*value: 1~4*/
|
||||
can_baudrate_struct.bts1_size = CAN_BTS1_6TQ; /*value: 1~16*/
|
||||
can_baudrate_struct.bts2_size = CAN_BTS2_1TQ; /*value: 1~8*/
|
||||
can_baudrate_set(CAN1, &can_baudrate_struct);
|
||||
|
||||
/*can_filter_0_config--------------------------------------------------------------*/
|
||||
can_filter_init_struct.filter_activate_enable = TRUE;
|
||||
can_filter_init_struct.filter_number = 0;
|
||||
can_filter_init_struct.filter_fifo = CAN_FILTER_FIFO0;
|
||||
can_filter_init_struct.filter_bit = CAN_FILTER_16BIT;
|
||||
can_filter_init_struct.filter_mode = CAN_FILTER_MODE_ID_MASK;
|
||||
/*Standard identifier + Mask Mode + Data/Remote frame: id/mask 11bit --------------*/
|
||||
can_filter_init_struct.filter_id_high = 0x0 << 5;
|
||||
can_filter_init_struct.filter_id_low = 0x0 << 5;
|
||||
can_filter_init_struct.filter_mask_high = 0x0 << 5;
|
||||
can_filter_init_struct.filter_mask_low = 0x0 << 5;
|
||||
|
||||
can_filter_init(CAN1, &can_filter_init_struct);
|
||||
|
||||
/**
|
||||
* Users need to configure CAN1 interrupt functions according to the actual application.
|
||||
* 1. Call the below function to enable the corresponding CAN1 interrupt.
|
||||
* --can_interrupt_enable(...)
|
||||
* 2. Add the user's interrupt handler code into the below function in the at32f402_405_int.c file.
|
||||
* --void CAN1_IRQHandler(void)
|
||||
*/
|
||||
|
||||
/* add user code begin can1_init 2 */
|
||||
can_interrupt_enable(CAN1, CAN_RF0MIEN_INT, TRUE);
|
||||
/* add user code end can1_init 2 */
|
||||
}
|
||||
|
||||
/* add user code begin 1 */
|
||||
|
||||
/* add user code end 1 */
|
||||
98
project/src/by_debug.c
Normal file
98
project/src/by_debug.c
Normal file
@@ -0,0 +1,98 @@
|
||||
#include "by_debug.h"
|
||||
|
||||
#include "at32f425.h"
|
||||
#include "lwprintf.h"
|
||||
|
||||
/* delay macros */
|
||||
#define STEP_DELAY_MS 50
|
||||
|
||||
/* delay variable */
|
||||
static __IO uint32_t fac_us;
|
||||
static __IO uint32_t fac_ms;
|
||||
|
||||
int lwprintf_out(int ch, lwprintf_t *lwp)
|
||||
{
|
||||
|
||||
/* May use printf to output it for test */
|
||||
|
||||
if (ch != '\0') {
|
||||
while (usart_flag_get(BY_DEBUG_USART_INDEX, USART_TDC_FLAG) == RESET);
|
||||
usart_data_transmit(BY_DEBUG_USART_INDEX, (char)ch);
|
||||
}
|
||||
|
||||
return ch;
|
||||
}
|
||||
|
||||
void by_debug_init(void)
|
||||
{
|
||||
lwprintf_init(lwprintf_out);
|
||||
}
|
||||
|
||||
void delay_init(void)
|
||||
{
|
||||
systick_clock_source_config(SYSTICK_CLOCK_SOURCE_AHBCLK_DIV8);
|
||||
crm_clocks_freq_type clocks;
|
||||
crm_clocks_freq_get(&clocks);
|
||||
fac_us = clocks.sclk_freq / (8000000U);
|
||||
fac_ms = fac_us * (1000U);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief inserts a delay time.
|
||||
* @param nus: specifies the delay time length, in microsecond.
|
||||
* @retval none
|
||||
*/
|
||||
void delay_us(uint32_t nus)
|
||||
{
|
||||
uint32_t temp = 0;
|
||||
SysTick->LOAD = (uint32_t)(nus * fac_us);
|
||||
SysTick->VAL = 0x00;
|
||||
SysTick->CTRL |= SysTick_CTRL_ENABLE_Msk;
|
||||
do {
|
||||
temp = SysTick->CTRL;
|
||||
} while ((temp & 0x01) && !(temp & (1 << 16)));
|
||||
|
||||
SysTick->CTRL &= ~SysTick_CTRL_ENABLE_Msk;
|
||||
SysTick->VAL = 0x00;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief inserts a delay time.
|
||||
* @param nms: specifies the delay time length, in milliseconds.
|
||||
* @retval none
|
||||
*/
|
||||
void delay_ms(uint16_t nms)
|
||||
{
|
||||
uint32_t temp = 0;
|
||||
while (nms) {
|
||||
if (nms > STEP_DELAY_MS) {
|
||||
SysTick->LOAD = (uint32_t)(STEP_DELAY_MS * fac_ms);
|
||||
nms -= STEP_DELAY_MS;
|
||||
} else {
|
||||
SysTick->LOAD = (uint32_t)(nms * fac_ms);
|
||||
nms = 0;
|
||||
}
|
||||
SysTick->VAL = 0x00;
|
||||
SysTick->CTRL |= SysTick_CTRL_ENABLE_Msk;
|
||||
do {
|
||||
temp = SysTick->CTRL;
|
||||
} while ((temp & 0x01) && !(temp & (1 << 16)));
|
||||
|
||||
SysTick->CTRL &= ~SysTick_CTRL_ENABLE_Msk;
|
||||
SysTick->VAL = 0x00;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief inserts a delay time.
|
||||
* @param sec: specifies the delay time, in seconds.
|
||||
* @retval none
|
||||
*/
|
||||
void delay_sec(uint16_t sec)
|
||||
{
|
||||
uint16_t index;
|
||||
for (index = 0; index < sec; index++) {
|
||||
delay_ms(500);
|
||||
delay_ms(500);
|
||||
}
|
||||
}
|
||||
126
project/src/main.c
Normal file
126
project/src/main.c
Normal file
@@ -0,0 +1,126 @@
|
||||
/* add user code begin Header */
|
||||
/**
|
||||
**************************************************************************
|
||||
* @file main.c
|
||||
* @brief main program
|
||||
**************************************************************************
|
||||
* Copyright notice & Disclaimer
|
||||
*
|
||||
* The software Board Support Package (BSP) that is made available to
|
||||
* download from Artery official website is the copyrighted work of Artery.
|
||||
* Artery authorizes customers to use, copy, and distribute the BSP
|
||||
* software and its related documentation for the purpose of design and
|
||||
* development in conjunction with Artery microcontrollers. Use of the
|
||||
* software is governed by this copyright notice and the following disclaimer.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES,
|
||||
* GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS,
|
||||
* TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR
|
||||
* STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS,
|
||||
* INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.
|
||||
*
|
||||
**************************************************************************
|
||||
*/
|
||||
/* add user code end Header */
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "at32f425_wk_config.h"
|
||||
|
||||
/* private includes ----------------------------------------------------------*/
|
||||
/* add user code begin private includes */
|
||||
#include "by_debug.h"
|
||||
#include "by_motion.h"
|
||||
/* add user code end private includes */
|
||||
|
||||
/* private typedef -----------------------------------------------------------*/
|
||||
/* add user code begin private typedef */
|
||||
|
||||
/* add user code end private typedef */
|
||||
|
||||
/* private define ------------------------------------------------------------*/
|
||||
/* add user code begin private define */
|
||||
|
||||
/* add user code end private define */
|
||||
|
||||
/* private macro -------------------------------------------------------------*/
|
||||
/* add user code begin private macro */
|
||||
|
||||
/* add user code end private macro */
|
||||
|
||||
/* private variables ---------------------------------------------------------*/
|
||||
/* add user code begin private variables */
|
||||
|
||||
/* add user code end private variables */
|
||||
|
||||
/* private function prototypes --------------------------------------------*/
|
||||
/* add user code begin function prototypes */
|
||||
|
||||
/* add user code end function prototypes */
|
||||
|
||||
/* private user code ---------------------------------------------------------*/
|
||||
/* add user code begin 0 */
|
||||
|
||||
/* add user code end 0 */
|
||||
|
||||
/**
|
||||
* @brief main function.
|
||||
* @param none
|
||||
* @retval none
|
||||
*/
|
||||
int main(void)
|
||||
{
|
||||
/* add user code begin 1 */
|
||||
by_debug_init();
|
||||
/* add user code end 1 */
|
||||
|
||||
/* system clock config. */
|
||||
wk_system_clock_config();
|
||||
|
||||
/* config periph clock. */
|
||||
wk_periph_clock_config();
|
||||
|
||||
/* nvic config. */
|
||||
wk_nvic_config();
|
||||
|
||||
/* init usart1 function. */
|
||||
wk_usart1_init();
|
||||
|
||||
/* init can1 function. */
|
||||
wk_can1_init();
|
||||
|
||||
/* init gpio function. */
|
||||
wk_gpio_config();
|
||||
|
||||
/* init tmr1 function. */
|
||||
wk_tmr1_init();
|
||||
|
||||
/* init tmr2 function. */
|
||||
wk_tmr2_init();
|
||||
|
||||
/* init tmr3 function. */
|
||||
wk_tmr3_init();
|
||||
|
||||
/* init tmr6 function. */
|
||||
wk_tmr6_init();
|
||||
|
||||
/* init tmr7 function. */
|
||||
wk_tmr7_init();
|
||||
|
||||
/* add user code begin 2 */
|
||||
delay_init();
|
||||
LOGD("init delay");
|
||||
|
||||
by_motion_init();
|
||||
LOGD("init motion");
|
||||
|
||||
/* add user code end 2 */
|
||||
|
||||
while(1)
|
||||
{
|
||||
/* add user code begin 3 */
|
||||
lwprintf("%f,%f,%f\r\n", param_m2.real_speed, param_m2.target_speed, param_m2.out_pwm);
|
||||
delay_ms(10);
|
||||
/* add user code end 3 */
|
||||
}
|
||||
}
|
||||
Reference in New Issue
Block a user