feat: 增加一些基础功能

2024-05-11 19:37:02 +08:00
parent 2299b60a17
commit f15fcd4b10
22 changed files with 2833 additions and 57 deletions
--- a/project/inc/at32f415_conf.h
+++ b/project/inc/at32f415_conf.h
@@ -52,11 +52,11 @@ extern "C" {

 /* module define -------------------------------------------------------------*/
 /*#define ADC_MODULE_ENABLED----------------------*/
-/*#define CAN_MODULE_ENABLED----------------------*/
+#define CAN_MODULE_ENABLED
 /*#define CMP_MODULE_ENABLED----------------------*/
 /*#define CRC_MODULE_ENABLED----------------------*/
 #define CRM_MODULE_ENABLED
-/*#define DEBUG_MODULE_ENABLED--------------------*/
+#define DEBUG_MODULE_ENABLED
 /*#define DMA_MODULE_ENABLED----------------------*/
 /*#define ERTC_MODULE_ENABLED---------------------*/
 /*#define EXINT_MODULE_ENABLED--------------------*/
@@ -68,7 +68,7 @@ extern "C" {
 /*#define SDIO_MODULE_ENABLED---------------------*/
 /*#define SPI_MODULE_ENABLED----------------------*/
 #define TMR_MODULE_ENABLED
-/*#define USART_MODULE_ENABLED--------------------*/
+#define USART_MODULE_ENABLED
 /*#define USB_MODULE_ENABLED----------------------*/
 /*#define WDT_MODULE_ENABLED----------------------*/
 /*#define WWDT_MODULE_ENABLED---------------------*/
--- a/project/inc/at32f415_int.h
+++ b/project/inc/at32f415_int.h
@@ -65,6 +65,7 @@ void SVC_Handler(void);
 void DebugMon_Handler(void);
 void PendSV_Handler(void);

+void CAN1_RX0_IRQHandler(void);

 /* add user code begin exported functions */

--- a/project/inc/at32f415_wk_config.h
+++ b/project/inc/at32f415_wk_config.h
@@ -55,6 +55,65 @@ extern "C" {

 /* add user code end exported macro */

+/* add user code begin dma define */
+/* user can only modify the dma define value */
+//#define DMA1_CHANNEL1_BUFFER_SIZE   0
+//#define DMA1_CHANNEL1_MEMORY_BASE_ADDR   0
+//#define DMA1_CHANNEL1_PERIPHERAL_BASE_ADDR  0
+
+//#define DMA1_CHANNEL2_BUFFER_SIZE   0
+//#define DMA1_CHANNEL2_MEMORY_BASE_ADDR   0
+//#define DMA1_CHANNEL2_PERIPHERAL_BASE_ADDR   0
+
+//#define DMA1_CHANNEL3_BUFFER_SIZE   0
+//#define DMA1_CHANNEL3_MEMORY_BASE_ADDR   0
+//#define DMA1_CHANNEL3_PERIPHERAL_BASE_ADDR   0
+
+//#define DMA1_CHANNEL4_BUFFER_SIZE   0
+//#define DMA1_CHANNEL4_MEMORY_BASE_ADDR   0
+//#define DMA1_CHANNEL4_PERIPHERAL_BASE_ADDR   0
+
+//#define DMA1_CHANNEL5_BUFFER_SIZE   0
+//#define DMA1_CHANNEL5_MEMORY_BASE_ADDR   0
+//#define DMA1_CHANNEL5_PERIPHERAL_BASE_ADDR   0
+
+//#define DMA1_CHANNEL6_BUFFER_SIZE   0
+//#define DMA1_CHANNEL6_MEMORY_BASE_ADDR   0
+//#define DMA1_CHANNEL6_PERIPHERAL_BASE_ADDR   0
+
+//#define DMA1_CHANNEL7_BUFFER_SIZE   0
+//#define DMA1_CHANNEL7_MEMORY_BASE_ADDR   0
+//#define DMA1_CHANNEL7_PERIPHERAL_BASE_ADDR   0
+
+//#define DMA2_CHANNEL1_BUFFER_SIZE   0
+//#define DMA2_CHANNEL1_MEMORY_BASE_ADDR   0
+//#define DMA2_CHANNEL1_PERIPHERAL_BASE_ADDR   0
+
+//#define DMA2_CHANNEL2_BUFFER_SIZE   0
+//#define DMA2_CHANNEL2_MEMORY_BASE_ADDR   0
+//#define DMA2_CHANNEL2_PERIPHERAL_BASE_ADDR   0
+
+//#define DMA2_CHANNEL3_BUFFER_SIZE   0
+//#define DMA2_CHANNEL3_MEMORY_BASE_ADDR   0
+//#define DMA2_CHANNEL3_PERIPHERAL_BASE_ADDR   0
+
+//#define DMA2_CHANNEL4_BUFFER_SIZE   0
+//#define DMA2_CHANNEL4_MEMORY_BASE_ADDR   0
+//#define DMA2_CHANNEL4_PERIPHERAL_BASE_ADDR   0
+
+//#define DMA2_CHANNEL5_BUFFER_SIZE   0
+//#define DMA2_CHANNEL5_MEMORY_BASE_ADDR   0
+//#define DMA2_CHANNEL5_PERIPHERAL_BASE_ADDR   0
+
+//#define DMA2_CHANNEL6_BUFFER_SIZE   0
+//#define DMA2_CHANNEL6_MEMORY_BASE_ADDR   0
+//#define DMA2_CHANNEL6_PERIPHERAL_BASE_ADDR   0
+
+//#define DMA2_CHANNEL7_BUFFER_SIZE   0
+//#define DMA2_CHANNEL7_MEMORY_BASE_ADDR   0
+//#define DMA2_CHANNEL7_PERIPHERAL_BASE_ADDR   0
+/* add user code end dma define */
+
 /* exported functions ------------------------------------------------------- */
  /* system clock config. */
  void wk_system_clock_config(void);
@@ -62,9 +121,21 @@ extern "C" {
  /* config periph clock. */
  void wk_periph_clock_config(void);

+  /* init debug function. */
+  void wk_debug_config(void);
+
  /* nvic config. */
  void wk_nvic_config(void);

+  /* init gpio function. */
+  void wk_gpio_config(void);
+
+  /* init can1 function. */
+  void wk_can1_init(void);
+
+  /* init usart2 function. */
+  void wk_usart2_init(void);
+
  /* init tmr1 function. */
  void wk_tmr1_init(void);

--- a/project/inc/by_debug.h
+++ b/project/inc/by_debug.h
@@ -0,0 +1,35 @@
+#ifndef _BY_DEBUG_H__
+#define _BY_DEBUG_H__
+
+#include <stdio.h>
+#include "at32f415.h"
+#include "lwprintf.h"
+
+#define BY_DEBUG_USART_INDEX (USART2)
+
+#define BY_DEBUG_LOG_MODE    (2) // 0-not log, 1-no debug log, 2-all
+
+#if (BY_DEBUG_LOG_MODE == 2)
+#define LOGI(format, ...) lwprintf("[INFO] " format "\r\n", ##__VA_ARGS__)
+#define LOGW(format, ...) lwprintf("[WARN] " format "\r\n", ##__VA_ARGS__)
+#define LOGE(format, ...) lwprintf("[ERR] " format "\r\n", ##__VA_ARGS__)
+#define LOGD(format, ...) lwprintf("[DEBUG] " format "\r\n", ##__VA_ARGS__)
+#elif (BY_DEBUG_LOG_MODE == 1)
+#define LOGI(format, ...) lwprintf("[INFO] " format "\r\n", ##__VA_ARGS__)
+#define LOGW(format, ...) lwprintf("[WARN] " format "\r\n", ##__VA_ARGS__)
+#define LOGE(format, ...) lwprintf("[ERR] " format "\r\n", ##__VA_ARGS__)
+#define LOGD(format, ...)
+#elif (BY_DEBUG_LOG_MODE == 0)
+#define LOGI(format, ...)
+#define LOGW(format, ...)
+#define LOGE(format, ...)
+#define LOGD(format, ...)
+#endif
+
+extern void by_debug_init(void);
+extern void delay_init(void);
+extern void delay_us(uint32_t nus);
+extern void delay_ms(uint16_t nms);
+extern void delay_sec(uint16_t sec);
+
+#endif
--- a/project/src/at32f415_int.c
+++ b/project/src/at32f415_int.c
@@ -204,6 +204,21 @@ void PendSV_Handler(void)
  /* add user code end PendSV_IRQ 1 */
 }

+/**
+  * @brief  this function handles CAN1 RX0 handler.
+  * @param  none
+  * @retval none
+  */
+void CAN1_RX0_IRQHandler(void)
+{
+  /* add user code begin CAN1_RX0_IRQ 0 */
+
+  /* add user code end CAN1_RX0_IRQ 0 */
+  /* add user code begin CAN1_RX0_IRQ 1 */
+
+  /* add user code end CAN1_RX0_IRQ 1 */
+}
+
 /* add user code begin 1 */

 /* add user code end 1 */
--- a/project/src/at32f415_wk_config.c
+++ b/project/src/at32f415_wk_config.c
@@ -161,6 +161,23 @@ void wk_periph_clock_config(void)

  /* enable tmr3 periph clock */
  crm_periph_clock_enable(CRM_TMR3_PERIPH_CLOCK, TRUE);
+
+  /* enable usart2 periph clock */
+  crm_periph_clock_enable(CRM_USART2_PERIPH_CLOCK, TRUE);
+
+  /* enable can1 periph clock */
+  crm_periph_clock_enable(CRM_CAN1_PERIPH_CLOCK, TRUE);
+}
+
+/**
+  * @brief  init debug function.
+  * @param  none
+  * @retval none
+  */
+void wk_debug_config(void)
+{
+  /* jtag-dp disabled and sw-dp enabled */
+  gpio_pin_remap_config(SWJTAG_GMUX_010, TRUE);
 }

 /**
@@ -171,6 +188,90 @@ void wk_periph_clock_config(void)
 void wk_nvic_config(void)
 {
  nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
+
+  nvic_irq_enable(CAN1_RX0_IRQn, 0, 0);
+}
+
+/**
+  * @brief  init gpio_input/gpio_output/gpio_analog/eventout function.
+  * @param  none
+  * @retval none
+  */
+void wk_gpio_config(void)
+{
+  /* add user code begin gpio_config 0 */
+
+  /* add user code end gpio_config 0 */
+
+  gpio_init_type gpio_init_struct;
+  gpio_default_para_init(&gpio_init_struct);
+
+  /* add user code begin gpio_config 1 */
+
+  /* add user code end gpio_config 1 */
+
+  /* gpio output config */
+  gpio_bits_reset(GPIOA, GPIO_PINS_10);
+
+  gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_MODERATE;
+  gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
+  gpio_init_struct.gpio_mode = GPIO_MODE_OUTPUT;
+  gpio_init_struct.gpio_pins = GPIO_PINS_10;
+  gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
+  gpio_init(GPIOA, &gpio_init_struct);
+
+  /* add user code begin gpio_config 2 */
+
+  /* add user code end gpio_config 2 */
+}
+
+/**
+  * @brief  init usart2 function
+  * @param  none
+  * @retval none
+  */
+void wk_usart2_init(void)
+{
+  /* add user code begin usart2_init 0 */
+
+  /* add user code end usart2_init 0 */
+
+  gpio_init_type gpio_init_struct;
+  gpio_default_para_init(&gpio_init_struct);
+
+  /* add user code begin usart2_init 1 */
+
+  /* add user code end usart2_init 1 */
+
+  /* configure the TX pin */
+  gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_MODERATE;
+  gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
+  gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
+  gpio_init_struct.gpio_pins = GPIO_PINS_2;
+  gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
+  gpio_init(GPIOA, &gpio_init_struct);
+
+  /* configure the RX pin */
+  gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_MODERATE;
+  gpio_init_struct.gpio_out_type  = GPIO_OUTPUT_PUSH_PULL;
+  gpio_init_struct.gpio_mode = GPIO_MODE_INPUT;
+  gpio_init_struct.gpio_pins = GPIO_PINS_3;
+  gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
+  gpio_init(GPIOA, &gpio_init_struct);
+
+  /* configure param */
+  usart_init(USART2, 115200, USART_DATA_8BITS, USART_STOP_1_BIT);
+  usart_transmitter_enable(USART2, TRUE);
+  usart_receiver_enable(USART2, TRUE);
+  usart_parity_selection_config(USART2, USART_PARITY_NONE);
+
+  usart_hardware_flow_control_set(USART2, USART_HARDWARE_FLOW_NONE);
+
+  usart_enable(USART2, TRUE);
+
+  /* add user code begin usart2_init 2 */
+
+  /* add user code end usart2_init 2 */
 }

 /**
@@ -210,24 +311,8 @@ void wk_tmr1_init(void)
  gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_MODERATE;
  gpio_init(GPIOA, &gpio_init_struct);

-  /* configure the CH3 pin */
-  gpio_init_struct.gpio_pins = GPIO_PINS_10;
-  gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
-  gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
-  gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
-  gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_MODERATE;
-  gpio_init(GPIOA, &gpio_init_struct);
-
-  /* configure the CH4 pin */
-  gpio_init_struct.gpio_pins = GPIO_PINS_11;
-  gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
-  gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
-  gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
-  gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_MODERATE;
-  gpio_init(GPIOA, &gpio_init_struct);
-
  /* configure counter settings */
-  tmr_base_init(TMR1, 65535, 0);
+  tmr_base_init(TMR1, 9999, 287);
  tmr_cnt_dir_set(TMR1, TMR_COUNT_UP);
  tmr_clock_source_div_set(TMR1, TMR_CLOCK_DIV1);
  tmr_repetition_counter_set(TMR1, 0);
@@ -238,7 +323,7 @@ void wk_tmr1_init(void)
  tmr_primary_mode_select(TMR1, TMR_PRIMARY_SEL_RESET);

  /* configure channel 1 output settings */
-  tmr_output_struct.oc_mode = TMR_OUTPUT_CONTROL_OFF;
+  tmr_output_struct.oc_mode = TMR_OUTPUT_CONTROL_PWM_MODE_A;
  tmr_output_struct.oc_output_state = TRUE;
  tmr_output_struct.occ_output_state = FALSE;
  tmr_output_struct.oc_polarity = TMR_OUTPUT_ACTIVE_HIGH;
@@ -249,8 +334,10 @@ void wk_tmr1_init(void)
  tmr_channel_value_set(TMR1, TMR_SELECT_CHANNEL_1, 0);
  tmr_output_channel_buffer_enable(TMR1, TMR_SELECT_CHANNEL_1, FALSE);

+  tmr_output_channel_immediately_set(TMR1, TMR_SELECT_CHANNEL_1, FALSE);
+
  /* configure channel 2 output settings */
-  tmr_output_struct.oc_mode = TMR_OUTPUT_CONTROL_OFF;
+  tmr_output_struct.oc_mode = TMR_OUTPUT_CONTROL_PWM_MODE_A;
  tmr_output_struct.oc_output_state = TRUE;
  tmr_output_struct.occ_output_state = FALSE;
  tmr_output_struct.oc_polarity = TMR_OUTPUT_ACTIVE_HIGH;
@@ -261,29 +348,7 @@ void wk_tmr1_init(void)
  tmr_channel_value_set(TMR1, TMR_SELECT_CHANNEL_2, 0);
  tmr_output_channel_buffer_enable(TMR1, TMR_SELECT_CHANNEL_2, FALSE);

-  /* configure channel 3 output settings */
-  tmr_output_struct.oc_mode = TMR_OUTPUT_CONTROL_OFF;
-  tmr_output_struct.oc_output_state = TRUE;
-  tmr_output_struct.occ_output_state = FALSE;
-  tmr_output_struct.oc_polarity = TMR_OUTPUT_ACTIVE_HIGH;
-  tmr_output_struct.occ_polarity = TMR_OUTPUT_ACTIVE_HIGH;
-  tmr_output_struct.oc_idle_state = FALSE;
-  tmr_output_struct.occ_idle_state = FALSE;
-  tmr_output_channel_config(TMR1, TMR_SELECT_CHANNEL_3, &tmr_output_struct);
-  tmr_channel_value_set(TMR1, TMR_SELECT_CHANNEL_3, 0);
-  tmr_output_channel_buffer_enable(TMR1, TMR_SELECT_CHANNEL_3, FALSE);
-
-  /* configure channel 4 output settings */
-  tmr_output_struct.oc_mode = TMR_OUTPUT_CONTROL_OFF;
-  tmr_output_struct.oc_output_state = TRUE;
-  tmr_output_struct.occ_output_state = FALSE;
-  tmr_output_struct.oc_polarity = TMR_OUTPUT_ACTIVE_HIGH;
-  tmr_output_struct.occ_polarity = TMR_OUTPUT_ACTIVE_HIGH;
-  tmr_output_struct.oc_idle_state = FALSE;
-  tmr_output_struct.occ_idle_state = FALSE;
-  tmr_output_channel_config(TMR1, TMR_SELECT_CHANNEL_4, &tmr_output_struct);
-  tmr_channel_value_set(TMR1, TMR_SELECT_CHANNEL_4, 0);
-  tmr_output_channel_buffer_enable(TMR1, TMR_SELECT_CHANNEL_4, FALSE);
+  tmr_output_channel_immediately_set(TMR1, TMR_SELECT_CHANNEL_2, FALSE);

  /* configure break and dead-time settings */
  tmr_brkdt_struct.brk_enable = FALSE;
@@ -325,6 +390,22 @@ void wk_tmr3_init(void)

  /* add user code end tmr3_init 1 */

+  /* configure the CH1 pin */
+  gpio_init_struct.gpio_pins = GPIO_PINS_6;
+  gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
+  gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
+  gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
+  gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_MODERATE;
+  gpio_init(GPIOA, &gpio_init_struct);
+
+  /* configure the CH2 pin */
+  gpio_init_struct.gpio_pins = GPIO_PINS_7;
+  gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
+  gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
+  gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
+  gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_MODERATE;
+  gpio_init(GPIOA, &gpio_init_struct);
+
  /* configure the CH3 pin */
  gpio_init_struct.gpio_pins = GPIO_PINS_0;
  gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
@@ -342,7 +423,7 @@ void wk_tmr3_init(void)
  gpio_init(GPIOB, &gpio_init_struct);

  /* configure counter settings */
-  tmr_base_init(TMR3, 65535, 0);
+  tmr_base_init(TMR3, 9999, 287);
  tmr_cnt_dir_set(TMR3, TMR_COUNT_UP);
  tmr_clock_source_div_set(TMR3, TMR_CLOCK_DIV1);
  tmr_period_buffer_enable(TMR3, FALSE);
@@ -351,8 +432,36 @@ void wk_tmr3_init(void)
  tmr_sub_sync_mode_set(TMR3, FALSE);
  tmr_primary_mode_select(TMR3, TMR_PRIMARY_SEL_RESET);

+  /* configure channel 1 output settings */
+  tmr_output_struct.oc_mode = TMR_OUTPUT_CONTROL_PWM_MODE_A;
+  tmr_output_struct.oc_output_state = TRUE;
+  tmr_output_struct.occ_output_state = FALSE;
+  tmr_output_struct.oc_polarity = TMR_OUTPUT_ACTIVE_HIGH;
+  tmr_output_struct.occ_polarity = TMR_OUTPUT_ACTIVE_HIGH;
+  tmr_output_struct.oc_idle_state = FALSE;
+  tmr_output_struct.occ_idle_state = FALSE;
+  tmr_output_channel_config(TMR3, TMR_SELECT_CHANNEL_1, &tmr_output_struct);
+  tmr_channel_value_set(TMR3, TMR_SELECT_CHANNEL_1, 0);
+  tmr_output_channel_buffer_enable(TMR3, TMR_SELECT_CHANNEL_1, FALSE);
+
+  tmr_output_channel_immediately_set(TMR3, TMR_SELECT_CHANNEL_1, FALSE);
+
+  /* configure channel 2 output settings */
+  tmr_output_struct.oc_mode = TMR_OUTPUT_CONTROL_PWM_MODE_A;
+  tmr_output_struct.oc_output_state = TRUE;
+  tmr_output_struct.occ_output_state = FALSE;
+  tmr_output_struct.oc_polarity = TMR_OUTPUT_ACTIVE_HIGH;
+  tmr_output_struct.occ_polarity = TMR_OUTPUT_ACTIVE_HIGH;
+  tmr_output_struct.oc_idle_state = FALSE;
+  tmr_output_struct.occ_idle_state = FALSE;
+  tmr_output_channel_config(TMR3, TMR_SELECT_CHANNEL_2, &tmr_output_struct);
+  tmr_channel_value_set(TMR3, TMR_SELECT_CHANNEL_2, 0);
+  tmr_output_channel_buffer_enable(TMR3, TMR_SELECT_CHANNEL_2, FALSE);
+
+  tmr_output_channel_immediately_set(TMR3, TMR_SELECT_CHANNEL_2, FALSE);
+
  /* configure channel 3 output settings */
-  tmr_output_struct.oc_mode = TMR_OUTPUT_CONTROL_OFF;
+  tmr_output_struct.oc_mode = TMR_OUTPUT_CONTROL_PWM_MODE_A;
  tmr_output_struct.oc_output_state = TRUE;
  tmr_output_struct.occ_output_state = FALSE;
  tmr_output_struct.oc_polarity = TMR_OUTPUT_ACTIVE_HIGH;
@@ -363,8 +472,10 @@ void wk_tmr3_init(void)
  tmr_channel_value_set(TMR3, TMR_SELECT_CHANNEL_3, 0);
  tmr_output_channel_buffer_enable(TMR3, TMR_SELECT_CHANNEL_3, FALSE);

+  tmr_output_channel_immediately_set(TMR3, TMR_SELECT_CHANNEL_3, FALSE);
+
  /* configure channel 4 output settings */
-  tmr_output_struct.oc_mode = TMR_OUTPUT_CONTROL_OFF;
+  tmr_output_struct.oc_mode = TMR_OUTPUT_CONTROL_PWM_MODE_A;
  tmr_output_struct.oc_output_state = TRUE;
  tmr_output_struct.occ_output_state = FALSE;
  tmr_output_struct.oc_polarity = TMR_OUTPUT_ACTIVE_HIGH;
@@ -375,6 +486,8 @@ void wk_tmr3_init(void)
  tmr_channel_value_set(TMR3, TMR_SELECT_CHANNEL_4, 0);
  tmr_output_channel_buffer_enable(TMR3, TMR_SELECT_CHANNEL_4, FALSE);

+  tmr_output_channel_immediately_set(TMR3, TMR_SELECT_CHANNEL_4, FALSE);
+

  tmr_counter_enable(TMR3, TRUE);

@@ -383,6 +496,92 @@ void wk_tmr3_init(void)
  /* add user code end tmr3_init 2 */
 }

+/**
+  * @brief  init can1 function.
+  * @param  none
+  * @retval none
+  */
+void wk_can1_init(void)
+{
+  /* add user code begin can1_init 0 */
+
+  /* add user code end can1_init 0 */
+  
+  gpio_init_type gpio_init_struct;
+  can_base_type can_base_struct;
+  can_baudrate_type can_baudrate_struct;
+  can_filter_init_type can_filter_init_struct;
+
+  /* add user code begin can1_init 1 */
+
+  /* add user code end can1_init 1 */
+  
+  /*gpio-----------------------------------------------------------------------------*/ 
+  gpio_default_para_init(&gpio_init_struct);
+
+  /* configure the CAN1 TX pin */
+  gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_MODERATE;
+  gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
+  gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
+  gpio_init_struct.gpio_pins = GPIO_PINS_12;
+  gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
+  gpio_init(GPIOA, &gpio_init_struct);
+
+  /* configure the CAN1 RX pin */
+  gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
+  gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
+  gpio_init_struct.gpio_mode = GPIO_MODE_INPUT;
+  gpio_init_struct.gpio_pins = GPIO_PINS_11;
+  gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
+  gpio_init(GPIOA, &gpio_init_struct);
+
+  /*can_base_init--------------------------------------------------------------------*/ 
+  can_default_para_init(&can_base_struct);
+  can_base_struct.mode_selection = CAN_MODE_COMMUNICATE;
+  can_base_struct.ttc_enable = FALSE;
+  can_base_struct.aebo_enable = TRUE;
+  can_base_struct.aed_enable = TRUE;
+  can_base_struct.prsf_enable = FALSE;
+  can_base_struct.mdrsel_selection = CAN_DISCARDING_FIRST_RECEIVED;
+  can_base_struct.mmssr_selection = CAN_SENDING_BY_ID;
+
+  can_base_init(CAN1, &can_base_struct);
+
+  /*can_baudrate_setting-------------------------------------------------------------*/ 
+  /*set baudrate = pclk/(baudrate_div *(1 + bts1_size + bts2_size))------------------*/ 
+  can_baudrate_struct.baudrate_div = 18;                       /*value: 1~0xFFF*/
+  can_baudrate_struct.rsaw_size = CAN_RSAW_1TQ;                /*value: 1~4*/
+  can_baudrate_struct.bts1_size = CAN_BTS1_6TQ;                /*value: 1~16*/
+  can_baudrate_struct.bts2_size = CAN_BTS2_1TQ;                /*value: 1~8*/
+  can_baudrate_set(CAN1, &can_baudrate_struct);
+
+  /*can_filter_0_config--------------------------------------------------------------*/
+  can_filter_init_struct.filter_activate_enable = TRUE;
+  can_filter_init_struct.filter_number = 0;
+  can_filter_init_struct.filter_fifo = CAN_FILTER_FIFO0;
+  can_filter_init_struct.filter_bit = CAN_FILTER_16BIT;  
+  can_filter_init_struct.filter_mode = CAN_FILTER_MODE_ID_MASK;  
+  /*Standard identifier + Mask Mode + Data/Remote frame: id/mask 11bit --------------*/
+  can_filter_init_struct.filter_id_high = 0x0 << 5;
+  can_filter_init_struct.filter_id_low = 0x0 << 5;
+  can_filter_init_struct.filter_mask_high = 0x0 << 5;
+  can_filter_init_struct.filter_mask_low = 0x0 << 5;
+
+  can_filter_init(CAN1, &can_filter_init_struct);
+
+  /**
+   * Users need to configure CAN1 interrupt functions according to the actual application.
+   * 1. Call the below function to enable the corresponding CAN1 interrupt.
+   *     --can_interrupt_enable(...)
+   * 2. Add the user's interrupt handler code into the below function in the at32f415_int.c file.
+   *     --void CAN1_RX0_IRQHandler(void)
+   */
+
+  /* add user code begin can1_init 2 */
+
+  /* add user code end can1_init 2 */
+}
+
 /* add user code begin 1 */

 /* add user code end 1 */
--- a/project/src/by_debug.c
+++ b/project/src/by_debug.c
@@ -0,0 +1,98 @@
+#include "by_debug.h"
+
+#include "at32f415.h"
+#include "lwprintf.h"
+
+/* delay macros */
+#define STEP_DELAY_MS 50
+
+/* delay variable */
+static __IO uint32_t fac_us;
+static __IO uint32_t fac_ms;
+
+int lwprintf_out(int ch, lwprintf_t *lwp)
+{
+
+  /* May use printf to output it for test */
+
+  if (ch != '\0') {
+    while (usart_flag_get(BY_DEBUG_USART_INDEX, USART_TDC_FLAG) == RESET);
+    usart_data_transmit(BY_DEBUG_USART_INDEX, (char)ch);
+  }
+
+  return ch;
+}
+
+void by_debug_init(void)
+{
+  lwprintf_init(lwprintf_out);
+}
+
+void delay_init(void)
+{
+  systick_clock_source_config(SYSTICK_CLOCK_SOURCE_AHBCLK_DIV8);
+  crm_clocks_freq_type clocks;
+  crm_clocks_freq_get(&clocks);
+  fac_us = clocks.sclk_freq / (8000000U);
+  fac_ms = fac_us * (1000U);
+}
+
+/**
+ * @brief  inserts a delay time.
+ * @param  nus: specifies the delay time length, in microsecond.
+ * @retval none
+ */
+void delay_us(uint32_t nus)
+{
+  uint32_t temp = 0;
+  SysTick->LOAD = (uint32_t)(nus * fac_us);
+  SysTick->VAL  = 0x00;
+  SysTick->CTRL |= SysTick_CTRL_ENABLE_Msk;
+  do {
+    temp = SysTick->CTRL;
+  } while ((temp & 0x01) && !(temp & (1 << 16)));
+
+  SysTick->CTRL &= ~SysTick_CTRL_ENABLE_Msk;
+  SysTick->VAL = 0x00;
+}
+
+/**
+ * @brief  inserts a delay time.
+ * @param  nms: specifies the delay time length, in milliseconds.
+ * @retval none
+ */
+void delay_ms(uint16_t nms)
+{
+  uint32_t temp = 0;
+  while (nms) {
+    if (nms > STEP_DELAY_MS) {
+      SysTick->LOAD = (uint32_t)(STEP_DELAY_MS * fac_ms);
+      nms -= STEP_DELAY_MS;
+    } else {
+      SysTick->LOAD = (uint32_t)(nms * fac_ms);
+      nms           = 0;
+    }
+    SysTick->VAL = 0x00;
+    SysTick->CTRL |= SysTick_CTRL_ENABLE_Msk;
+    do {
+      temp = SysTick->CTRL;
+    } while ((temp & 0x01) && !(temp & (1 << 16)));
+
+    SysTick->CTRL &= ~SysTick_CTRL_ENABLE_Msk;
+    SysTick->VAL = 0x00;
+  }
+}
+
+/**
+ * @brief  inserts a delay time.
+ * @param  sec: specifies the delay time, in seconds.
+ * @retval none
+ */
+void delay_sec(uint16_t sec)
+{
+  uint16_t index;
+  for (index = 0; index < sec; index++) {
+    delay_ms(500);
+    delay_ms(500);
+  }
+}
--- a/project/src/main.c
+++ b/project/src/main.c
@@ -29,7 +29,7 @@

 /* private includes ----------------------------------------------------------*/
 /* add user code begin private includes */
-
+#include "by_debug.h"
 /* add user code end private includes */

 /* private typedef -----------------------------------------------------------*/
@@ -79,17 +79,29 @@ int main(void)
  /* config periph clock. */
  wk_periph_clock_config();

+  /* init debug function. */
+  wk_debug_config();
+
  /* nvic config. */
  wk_nvic_config();

+  /* init usart2 function. */
+  wk_usart2_init();
+
  /* init tmr1 function. */
  wk_tmr1_init();

  /* init tmr3 function. */
  wk_tmr3_init();

-  /* add user code begin 2 */
+  /* init can1 function. */
+  wk_can1_init();

+  /* init gpio function. */
+  wk_gpio_config();
+
+  /* add user code begin 2 */
+  delay_init();
  /* add user code end 2 */

  while(1)