initial commit

This commit is contained in:
bmy
2024-05-06 18:11:44 +08:00
commit c3c1a7e7f0
92 changed files with 51815 additions and 0 deletions

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project/MDK_V5/BC3S.uvprojx Normal file
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<?xml version="1.0" encoding="UTF-8"?>
<Project xsi:noNamespaceSchemaLocation="project_projx.xsd" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">
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<TargetDllArguments> -MPU</TargetDllArguments>
<TargetDlgDll>TCM.DLL</TargetDlgDll>
<TargetDlgDllArguments>-pCM4</TargetDlgDllArguments>
</DllOption>
<DebugOption>
<OPTHX>
<HexSelection>1</HexSelection>
<HexRangeLowAddress>0</HexRangeLowAddress>
<HexRangeHighAddress>0</HexRangeHighAddress>
<HexOffset>0</HexOffset>
<Oh166RecLen>16</Oh166RecLen>
</OPTHX>
</DebugOption>
<Utilities>
<Flash1>
<UseTargetDll>1</UseTargetDll>
<UseExternalTool>0</UseExternalTool>
<RunIndependent>0</RunIndependent>
<UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
<Capability>1</Capability>
<DriverSelection>4096</DriverSelection>
</Flash1>
<bUseTDR>1</bUseTDR>
<Flash2>BIN\UL2CM3.DLL</Flash2>
<Flash3/>
<Flash4/>
<pFcarmOut/>
<pFcarmGrp/>
<pFcArmRoot/>
<FcArmLst>0</FcArmLst>
</Utilities>
<TargetArmAds>
<ArmAdsMisc>
<GenerateListings>0</GenerateListings>
<asHll>1</asHll>
<asAsm>1</asAsm>
<asMacX>1</asMacX>
<asSyms>1</asSyms>
<asFals>1</asFals>
<asDbgD>1</asDbgD>
<asForm>1</asForm>
<ldLst>0</ldLst>
<ldmm>1</ldmm>
<ldXref>1</ldXref>
<BigEnd>0</BigEnd>
<AdsALst>1</AdsALst>
<AdsACrf>1</AdsACrf>
<AdsANop>0</AdsANop>
<AdsANot>0</AdsANot>
<AdsLLst>1</AdsLLst>
<AdsLmap>1</AdsLmap>
<AdsLcgr>1</AdsLcgr>
<AdsLsym>1</AdsLsym>
<AdsLszi>1</AdsLszi>
<AdsLtoi>1</AdsLtoi>
<AdsLsun>1</AdsLsun>
<AdsLven>1</AdsLven>
<AdsLsxf>1</AdsLsxf>
<RvctClst>0</RvctClst>
<GenPPlst>0</GenPPlst>
<AdsCpuType>"Cortex-M4"</AdsCpuType>
<RvctDeviceName/>
<mOS>0</mOS>
<uocRom>0</uocRom>
<uocRam>0</uocRam>
<hadIROM>1</hadIROM>
<hadIRAM>1</hadIRAM>
<hadXRAM>0</hadXRAM>
<uocXRam>0</uocXRam>
<RvdsVP>0</RvdsVP>
<RvdsMve>0</RvdsMve>
<RvdsCdeCp>0</RvdsCdeCp>
<hadIRAM2>0</hadIRAM2>
<hadIROM2>0</hadIROM2>
<StupSel>8</StupSel>
<useUlib>0</useUlib>
<EndSel>0</EndSel>
<uLtcg>0</uLtcg>
<nSecure>0</nSecure>
<RoSelD>3</RoSelD>
<RwSelD>3</RwSelD>
<CodeSel>0</CodeSel>
<OptFeed>0</OptFeed>
<NoZi1>0</NoZi1>
<NoZi2>0</NoZi2>
<NoZi3>0</NoZi3>
<NoZi4>0</NoZi4>
<NoZi5>0</NoZi5>
<Ro1Chk>0</Ro1Chk>
<Ro2Chk>0</Ro2Chk>
<Ro3Chk>0</Ro3Chk>
<Ir1Chk>1</Ir1Chk>
<Ir2Chk>0</Ir2Chk>
<Ra1Chk>0</Ra1Chk>
<Ra2Chk>0</Ra2Chk>
<Ra3Chk>0</Ra3Chk>
<Im1Chk>1</Im1Chk>
<Im2Chk>0</Im2Chk>
<OnChipMemories>
<Ocm1>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm1>
<Ocm2>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm2>
<Ocm3>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm3>
<Ocm4>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm4>
<Ocm5>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm5>
<Ocm6>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm6>
<IRAM>
<Type>0</Type>
<StartAddress>0x20000000</StartAddress>
<Size>0x8000</Size>
</IRAM>
<IROM>
<Type>1</Type>
<StartAddress>0x8000000</StartAddress>
<Size>0x20000</Size>
</IROM>
<XRAM>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</XRAM>
<OCR_RVCT1>
<Type>1</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT1>
<OCR_RVCT2>
<Type>1</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT2>
<OCR_RVCT3>
<Type>1</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT3>
<OCR_RVCT4>
<Type>1</Type>
<StartAddress>0x8000000</StartAddress>
<Size>0x20000</Size>
</OCR_RVCT4>
<OCR_RVCT5>
<Type>1</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT5>
<OCR_RVCT6>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT6>
<OCR_RVCT7>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT7>
<OCR_RVCT8>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT8>
<OCR_RVCT9>
<Type>0</Type>
<StartAddress>0x20000000</StartAddress>
<Size>0x8000</Size>
</OCR_RVCT9>
<OCR_RVCT10>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT10>
</OnChipMemories>
<RvctStartVector/>
</ArmAdsMisc>
<Cads>
<interw>1</interw>
<Optim>1</Optim>
<oTime>0</oTime>
<SplitLS>0</SplitLS>
<OneElfS>1</OneElfS>
<Strict>0</Strict>
<EnumInt>0</EnumInt>
<PlainCh>0</PlainCh>
<Ropi>0</Ropi>
<Rwpi>0</Rwpi>
<wLevel>2</wLevel>
<uThumb>0</uThumb>
<uSurpInc>0</uSurpInc>
<uC99>0</uC99>
<uGnu>0</uGnu>
<useXO>0</useXO>
<v6Lang>1</v6Lang>
<v6LangP>1</v6LangP>
<vShortEn>1</vShortEn>
<vShortWch>1</vShortWch>
<v6Lto>0</v6Lto>
<v6WtE>0</v6WtE>
<v6Rtti>0</v6Rtti>
<VariousControls>
<MiscControls/>
<Define>AT32F415KBU7_4,USE_STDPERIPH_DRIVER</Define>
<Undefine/>
<IncludePath>..\..\libraries\drivers\inc;..\..\libraries\cmsis\cm4\core_support;..\..\libraries\cmsis\cm4\device_support;..\inc</IncludePath>
</VariousControls>
</Cads>
<Aads>
<interw>1</interw>
<Ropi>0</Ropi>
<Rwpi>0</Rwpi>
<thumb>0</thumb>
<SplitLS>0</SplitLS>
<SwStkChk>0</SwStkChk>
<NoWarn>0</NoWarn>
<uSurpInc>0</uSurpInc>
<useXO>0</useXO>
<ClangAsOpt>4</ClangAsOpt>
<VariousControls>
<MiscControls/>
<Define/>
<Undefine/>
<IncludePath/>
</VariousControls>
</Aads>
<LDads>
<umfTarg>1</umfTarg>
<Ropi>0</Ropi>
<Rwpi>0</Rwpi>
<noStLib>0</noStLib>
<RepFail>1</RepFail>
<useFile>0</useFile>
<TextAddressRange>0x08000000</TextAddressRange>
<DataAddressRange>0x20000000</DataAddressRange>
<pXoBase/>
<ScatterFile/>
<IncludeLibs/>
<IncludeLibsPath/>
<Misc/>
<LinkerInputFile/>
<DisabledWarnings/>
</LDads>
</TargetArmAds>
</TargetOption>
<Groups>
<Group>
<GroupName>user</GroupName>
<Files>
<File>
<FileName>main.c</FileName>
<FileType>1</FileType>
<FilePath>..\src\main.c</FilePath>
</File>
<File>
<FileName>at32f415_wk_config.c</FileName>
<FileType>1</FileType>
<FilePath>..\src\at32f415_wk_config.c</FilePath>
</File>
<File>
<FileName>at32f415_int.c</FileName>
<FileType>1</FileType>
<FilePath>..\src\at32f415_int.c</FilePath>
</File>
</Files>
</Group>
<Group>
<GroupName>firmware</GroupName>
<Files>
<File>
<FileName>at32f415_can.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\libraries\drivers\src\at32f415_can.c</FilePath>
</File>
<File>
<FileName>at32f415_crm.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\libraries\drivers\src\at32f415_crm.c</FilePath>
</File>
<File>
<FileName>at32f415_debug.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\libraries\drivers\src\at32f415_debug.c</FilePath>
</File>
<File>
<FileName>at32f415_flash.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\libraries\drivers\src\at32f415_flash.c</FilePath>
</File>
<File>
<FileName>at32f415_gpio.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\libraries\drivers\src\at32f415_gpio.c</FilePath>
</File>
<File>
<FileName>at32f415_i2c.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\libraries\drivers\src\at32f415_i2c.c</FilePath>
</File>
<File>
<FileName>at32f415_misc.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\libraries\drivers\src\at32f415_misc.c</FilePath>
</File>
<File>
<FileName>at32f415_pwc.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\libraries\drivers\src\at32f415_pwc.c</FilePath>
</File>
<File>
<FileName>at32f415_tmr.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\libraries\drivers\src\at32f415_tmr.c</FilePath>
</File>
<File>
<FileName>at32f415_usart.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\libraries\drivers\src\at32f415_usart.c</FilePath>
</File>
</Files>
</Group>
<Group>
<GroupName>cmsis</GroupName>
<Files>
<File>
<FileName>system_at32f415.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\libraries\cmsis\cm4\device_support\system_at32f415.c</FilePath>
</File>
<File>
<FileName>startup_at32f415.s</FileName>
<FileType>2</FileType>
<FilePath>.\startup_at32f415.s</FilePath>
</File>
</Files>
</Group>
</Groups>
</Target>
</Targets>
<RTE>
<apis/>
<components/>
<files/>
</RTE>
<LayerInfo>
<Layers>
<Layer>
<LayName>BC3S</LayName>
<LayTarg>0</LayTarg>
<LayPrjMark>1</LayPrjMark>
</Layer>
</Layers>
</LayerInfo>
</Project>

View File

@@ -0,0 +1,340 @@
;**************************************************************************
;* @file startup_at32f415.s
;* @brief at32f415 startup file for keil
;* <<< Use Configuration Wizard in Context Menu >>>
;**************************************************************************
;
; Amount of memory (in bytes) allocated for Stack
; Tailor this value to your application needs
; <h> Stack Configuration
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
; </h>
Stack_Size EQU 0x00000400
AREA STACK, NOINIT, READWRITE, ALIGN=3
Stack_Mem SPACE Stack_Size
__initial_sp
; <h> Heap Configuration
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
; </h>
Heap_Size EQU 0x00000200
AREA HEAP, NOINIT, READWRITE, ALIGN=3
__heap_base
Heap_Mem SPACE Heap_Size
__heap_limit
PRESERVE8
THUMB
; Vector Table Mapped to Address 0 at Reset
AREA RESET, DATA, READONLY
EXPORT __Vectors
EXPORT __Vectors_End
EXPORT __Vectors_Size
__Vectors DCD __initial_sp ; Top of Stack
DCD Reset_Handler ; Reset Handler
DCD NMI_Handler ; NMI Handler
DCD HardFault_Handler ; Hard Fault Handler
DCD MemManage_Handler ; MPU Fault Handler
DCD BusFault_Handler ; Bus Fault Handler
DCD UsageFault_Handler ; Usage Fault Handler
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD SVC_Handler ; SVCall Handler
DCD DebugMon_Handler ; Debug Monitor Handler
DCD 0 ; Reserved
DCD PendSV_Handler ; PendSV Handler
DCD SysTick_Handler ; SysTick Handler
; External Interrupts
DCD WWDT_IRQHandler ; Window Watchdog Timer
DCD PVM_IRQHandler ; PVM through EXINT Line detect
DCD TAMP_STAMP_IRQHandler ; Tamper and TimeStamps through the EXINT line
DCD ERTC_WKUP_IRQHandler ; ERTC Wakeup through the EXINT line
DCD FLASH_IRQHandler ; Flash
DCD CRM_IRQHandler ; CRM
DCD EXINT0_IRQHandler ; EXINT Line 0
DCD EXINT1_IRQHandler ; EXINT Line 1
DCD EXINT2_IRQHandler ; EXINT Line 2
DCD EXINT3_IRQHandler ; EXINT Line 3
DCD EXINT4_IRQHandler ; EXINT Line 4
DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2
DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3
DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4
DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5
DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6
DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7
DCD ADC1_IRQHandler ; ADC1
DCD CAN1_TX_IRQHandler ; CAN1 TX
DCD CAN1_RX0_IRQHandler ; CAN1 RX0
DCD CAN1_RX1_IRQHandler ; CAN1 RX1
DCD CAN1_SE_IRQHandler ; CAN1 SE
DCD EXINT9_5_IRQHandler ; EXINT Line [9:5]
DCD TMR1_BRK_TMR9_IRQHandler ; TMR1 Brake and TMR9
DCD TMR1_OVF_TMR10_IRQHandler ; TMR1 overflow and TMR10
DCD TMR1_TRG_HALL_TMR11_IRQHandler ; TMR1 Trigger and hall and TMR11
DCD TMR1_CH_IRQHandler ; TMR1 channel
DCD TMR2_GLOBAL_IRQHandler ; TMR2
DCD TMR3_GLOBAL_IRQHandler ; TMR3
DCD TMR4_GLOBAL_IRQHandler ; TMR4
DCD I2C1_EVT_IRQHandler ; I2C1 Event
DCD I2C1_ERR_IRQHandler ; I2C1 Error
DCD I2C2_EVT_IRQHandler ; I2C2 Event
DCD I2C2_ERR_IRQHandler ; I2C2 Error
DCD SPI1_IRQHandler ; SPI1
DCD SPI2_IRQHandler ; SPI2
DCD USART1_IRQHandler ; USART1
DCD USART2_IRQHandler ; USART2
DCD USART3_IRQHandler ; USART3
DCD EXINT15_10_IRQHandler ; EXINT Line [15:10]
DCD ERTCAlarm_IRQHandler ; ERTC Alarm through EXINT Line
DCD OTGFS1_WKUP_IRQHandler ; OTGFS1 Wakeup from suspend
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD SDIO1_IRQHandler ; SDIO1
DCD TMR5_GLOBAL_IRQHandler ; TMR5
DCD 0 ; Reserved
DCD UART4_IRQHandler ; UART4
DCD UART5_IRQHandler ; UART5
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD DMA2_Channel1_IRQHandler ; DMA2 Channel1
DCD DMA2_Channel2_IRQHandler ; DMA2 Channel2
DCD DMA2_Channel3_IRQHandler ; DMA2 Channel3
DCD DMA2_Channel4_5_IRQHandler ; DMA2 Channel4 & Channel5
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD OTGFS1_IRQHandler ; OTGFS1
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD CMP1_IRQHandler ; CMP1
DCD CMP2_IRQHandler ; CMP2
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD DMA2_Channel6_7_IRQHandler ; DMA2 Channel6 & Channel7
__Vectors_End
__Vectors_Size EQU __Vectors_End - __Vectors
AREA |.text|, CODE, READONLY
; Reset handler
Reset_Handler PROC
EXPORT Reset_Handler [WEAK]
IMPORT __main
IMPORT SystemInit
LDR R0, =SystemInit
BLX R0
LDR R0, =__main
BX R0
ENDP
; Dummy Exception Handlers (infinite loops which can be modified)
NMI_Handler PROC
EXPORT NMI_Handler [WEAK]
B .
ENDP
HardFault_Handler\
PROC
EXPORT HardFault_Handler [WEAK]
B .
ENDP
MemManage_Handler\
PROC
EXPORT MemManage_Handler [WEAK]
B .
ENDP
BusFault_Handler\
PROC
EXPORT BusFault_Handler [WEAK]
B .
ENDP
UsageFault_Handler\
PROC
EXPORT UsageFault_Handler [WEAK]
B .
ENDP
SVC_Handler PROC
EXPORT SVC_Handler [WEAK]
B .
ENDP
DebugMon_Handler\
PROC
EXPORT DebugMon_Handler [WEAK]
B .
ENDP
PendSV_Handler PROC
EXPORT PendSV_Handler [WEAK]
B .
ENDP
SysTick_Handler PROC
EXPORT SysTick_Handler [WEAK]
B .
ENDP
Default_Handler PROC
EXPORT WWDT_IRQHandler [WEAK]
EXPORT PVM_IRQHandler [WEAK]
EXPORT TAMP_STAMP_IRQHandler [WEAK]
EXPORT ERTC_WKUP_IRQHandler [WEAK]
EXPORT FLASH_IRQHandler [WEAK]
EXPORT CRM_IRQHandler [WEAK]
EXPORT EXINT0_IRQHandler [WEAK]
EXPORT EXINT1_IRQHandler [WEAK]
EXPORT EXINT2_IRQHandler [WEAK]
EXPORT EXINT3_IRQHandler [WEAK]
EXPORT EXINT4_IRQHandler [WEAK]
EXPORT DMA1_Channel1_IRQHandler [WEAK]
EXPORT DMA1_Channel2_IRQHandler [WEAK]
EXPORT DMA1_Channel3_IRQHandler [WEAK]
EXPORT DMA1_Channel4_IRQHandler [WEAK]
EXPORT DMA1_Channel5_IRQHandler [WEAK]
EXPORT DMA1_Channel6_IRQHandler [WEAK]
EXPORT DMA1_Channel7_IRQHandler [WEAK]
EXPORT ADC1_IRQHandler [WEAK]
EXPORT CAN1_TX_IRQHandler [WEAK]
EXPORT CAN1_RX0_IRQHandler [WEAK]
EXPORT CAN1_RX1_IRQHandler [WEAK]
EXPORT CAN1_SE_IRQHandler [WEAK]
EXPORT EXINT9_5_IRQHandler [WEAK]
EXPORT TMR1_BRK_TMR9_IRQHandler [WEAK]
EXPORT TMR1_OVF_TMR10_IRQHandler [WEAK]
EXPORT TMR1_TRG_HALL_TMR11_IRQHandler [WEAK]
EXPORT TMR1_CH_IRQHandler [WEAK]
EXPORT TMR2_GLOBAL_IRQHandler [WEAK]
EXPORT TMR3_GLOBAL_IRQHandler [WEAK]
EXPORT TMR4_GLOBAL_IRQHandler [WEAK]
EXPORT I2C1_EVT_IRQHandler [WEAK]
EXPORT I2C1_ERR_IRQHandler [WEAK]
EXPORT I2C2_EVT_IRQHandler [WEAK]
EXPORT I2C2_ERR_IRQHandler [WEAK]
EXPORT SPI1_IRQHandler [WEAK]
EXPORT SPI2_IRQHandler [WEAK]
EXPORT USART1_IRQHandler [WEAK]
EXPORT USART2_IRQHandler [WEAK]
EXPORT USART3_IRQHandler [WEAK]
EXPORT EXINT15_10_IRQHandler [WEAK]
EXPORT ERTCAlarm_IRQHandler [WEAK]
EXPORT OTGFS1_WKUP_IRQHandler [WEAK]
EXPORT SDIO1_IRQHandler [WEAK]
EXPORT TMR5_GLOBAL_IRQHandler [WEAK]
EXPORT UART4_IRQHandler [WEAK]
EXPORT UART5_IRQHandler [WEAK]
EXPORT DMA2_Channel1_IRQHandler [WEAK]
EXPORT DMA2_Channel2_IRQHandler [WEAK]
EXPORT DMA2_Channel3_IRQHandler [WEAK]
EXPORT DMA2_Channel4_5_IRQHandler [WEAK]
EXPORT OTGFS1_IRQHandler [WEAK]
EXPORT CMP1_IRQHandler [WEAK]
EXPORT CMP2_IRQHandler [WEAK]
EXPORT DMA2_Channel6_7_IRQHandler [WEAK]
WWDT_IRQHandler
PVM_IRQHandler
TAMP_STAMP_IRQHandler
ERTC_WKUP_IRQHandler
FLASH_IRQHandler
CRM_IRQHandler
EXINT0_IRQHandler
EXINT1_IRQHandler
EXINT2_IRQHandler
EXINT3_IRQHandler
EXINT4_IRQHandler
DMA1_Channel1_IRQHandler
DMA1_Channel2_IRQHandler
DMA1_Channel3_IRQHandler
DMA1_Channel4_IRQHandler
DMA1_Channel5_IRQHandler
DMA1_Channel6_IRQHandler
DMA1_Channel7_IRQHandler
ADC1_IRQHandler
CAN1_TX_IRQHandler
CAN1_RX0_IRQHandler
CAN1_RX1_IRQHandler
CAN1_SE_IRQHandler
EXINT9_5_IRQHandler
TMR1_BRK_TMR9_IRQHandler
TMR1_OVF_TMR10_IRQHandler
TMR1_TRG_HALL_TMR11_IRQHandler
TMR1_CH_IRQHandler
TMR2_GLOBAL_IRQHandler
TMR3_GLOBAL_IRQHandler
TMR4_GLOBAL_IRQHandler
I2C1_EVT_IRQHandler
I2C1_ERR_IRQHandler
I2C2_EVT_IRQHandler
I2C2_ERR_IRQHandler
SPI1_IRQHandler
SPI2_IRQHandler
USART1_IRQHandler
USART2_IRQHandler
USART3_IRQHandler
EXINT15_10_IRQHandler
ERTCAlarm_IRQHandler
OTGFS1_WKUP_IRQHandler
SDIO1_IRQHandler
TMR5_GLOBAL_IRQHandler
UART4_IRQHandler
UART5_IRQHandler
DMA2_Channel1_IRQHandler
DMA2_Channel2_IRQHandler
DMA2_Channel3_IRQHandler
DMA2_Channel4_5_IRQHandler
OTGFS1_IRQHandler
CMP1_IRQHandler
CMP2_IRQHandler
DMA2_Channel6_7_IRQHandler
B .
ENDP
ALIGN
;*******************************************************************************
; User Stack and Heap initialization
;*******************************************************************************
IF :DEF:__MICROLIB
EXPORT __initial_sp
EXPORT __heap_base
EXPORT __heap_limit
ELSE
IMPORT __use_two_region_memory
EXPORT __user_initial_stackheap
__user_initial_stackheap
LDR R0, = Heap_Mem
LDR R1, = (Stack_Mem + Stack_Size)
LDR R2, = (Heap_Mem + Heap_Size)
LDR R3, = Stack_Mem
BX LR
ALIGN
ENDIF
END

145
project/inc/at32f415_conf.h Normal file
View File

@@ -0,0 +1,145 @@
/**
**************************************************************************
* @file at32f415_conf.h
* @brief at32f415 config header file
**************************************************************************
* Copyright notice & Disclaimer
*
* The software Board Support Package (BSP) that is made available to
* download from Artery official website is the copyrighted work of Artery.
* Artery authorizes customers to use, copy, and distribute the BSP
* software and its related documentation for the purpose of design and
* development in conjunction with Artery microcontrollers. Use of the
* software is governed by this copyright notice and the following disclaimer.
*
* THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES,
* GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS,
* TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR
* STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS,
* INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.
*
**************************************************************************
*/
/* define to prevent recursive inclusion -------------------------------------*/
#ifndef __AT32F415_CONF_H
#define __AT32F415_CONF_H
#ifdef __cplusplus
extern "C" {
#endif
/**
* @brief in the following line adjust the value of high speed exernal crystal (hext)
* used in your application
*
* tip: to avoid modifying this file each time you need to use different hext, you
* can define the hext value in your toolchain compiler preprocessor.
*
*/
#if !defined HEXT_VALUE
#define HEXT_VALUE ((uint32_t)8000000) /*!< value of the high speed exernal crystal in hz */
#endif
/**
* @brief in the following line adjust the high speed exernal crystal (hext) startup
* timeout value
*/
#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000) /*!< time out for hext start up */
#define HICK_VALUE ((uint32_t)8000000) /*!< value of the high speed internal clock in hz */
#define LEXT_VALUE ((uint32_t)32768) /*!< value of the low speed exernal clock in hz */
/* module define -------------------------------------------------------------*/
/*#define ADC_MODULE_ENABLED----------------------*/
#define CAN_MODULE_ENABLED
/*#define CMP_MODULE_ENABLED----------------------*/
/*#define CRC_MODULE_ENABLED----------------------*/
#define CRM_MODULE_ENABLED
#define DEBUG_MODULE_ENABLED
/*#define DMA_MODULE_ENABLED----------------------*/
/*#define ERTC_MODULE_ENABLED---------------------*/
/*#define EXINT_MODULE_ENABLED--------------------*/
#define FLASH_MODULE_ENABLED
#define GPIO_MODULE_ENABLED
#define I2C_MODULE_ENABLED
#define MISC_MODULE_ENABLED
#define PWC_MODULE_ENABLED
/*#define SDIO_MODULE_ENABLED---------------------*/
/*#define SPI_MODULE_ENABLED----------------------*/
#define TMR_MODULE_ENABLED
#define USART_MODULE_ENABLED
/*#define USB_MODULE_ENABLED----------------------*/
/*#define WDT_MODULE_ENABLED----------------------*/
/*#define WWDT_MODULE_ENABLED---------------------*/
/* includes ------------------------------------------------------------------*/
#ifdef ADC_MODULE_ENABLED
#include "at32f415_adc.h"
#endif
#ifdef CAN_MODULE_ENABLED
#include "at32f415_can.h"
#endif
#ifdef CMP_MODULE_ENABLED
#include "at32f415_cmp.h"
#endif
#ifdef CRC_MODULE_ENABLED
#include "at32f415_crc.h"
#endif
#ifdef CRM_MODULE_ENABLED
#include "at32f415_crm.h"
#endif
#ifdef DEBUG_MODULE_ENABLED
#include "at32f415_debug.h"
#endif
#ifdef DMA_MODULE_ENABLED
#include "at32f415_dma.h"
#endif
#ifdef ERTC_MODULE_ENABLED
#include "at32f415_ertc.h"
#endif
#ifdef EXINT_MODULE_ENABLED
#include "at32f415_exint.h"
#endif
#ifdef FLASH_MODULE_ENABLED
#include "at32f415_flash.h"
#endif
#ifdef GPIO_MODULE_ENABLED
#include "at32f415_gpio.h"
#endif
#ifdef I2C_MODULE_ENABLED
#include "at32f415_i2c.h"
#endif
#ifdef MISC_MODULE_ENABLED
#include "at32f415_misc.h"
#endif
#ifdef PWC_MODULE_ENABLED
#include "at32f415_pwc.h"
#endif
#ifdef SDIO_MODULE_ENABLED
#include "at32f415_sdio.h"
#endif
#ifdef SPI_MODULE_ENABLED
#include "at32f415_spi.h"
#endif
#ifdef TMR_MODULE_ENABLED
#include "at32f415_tmr.h"
#endif
#ifdef USART_MODULE_ENABLED
#include "at32f415_usart.h"
#endif
#ifdef USB_MODULE_ENABLED
#include "at32f415_usb.h"
#endif
#ifdef WDT_MODULE_ENABLED
#include "at32f415_wdt.h"
#endif
#ifdef WWDT_MODULE_ENABLED
#include "at32f415_wwdt.h"
#endif
#ifdef __cplusplus
}
#endif
#endif

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@@ -0,0 +1,78 @@
/* add user code begin Header */
/**
**************************************************************************
* @file at32f415_int.h
* @brief header file of main interrupt service routines.
**************************************************************************
* Copyright notice & Disclaimer
*
* The software Board Support Package (BSP) that is made available to
* download from Artery official website is the copyrighted work of Artery.
* Artery authorizes customers to use, copy, and distribute the BSP
* software and its related documentation for the purpose of design and
* development in conjunction with Artery microcontrollers. Use of the
* software is governed by this copyright notice and the following disclaimer.
*
* THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES,
* GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS,
* TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR
* STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS,
* INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.
*
**************************************************************************
*/
/* add user code end Header */
/* define to prevent recursive inclusion -------------------------------------*/
#ifndef __AT32F415_INT_H
#define __AT32F415_INT_H
#ifdef __cplusplus
extern "C" {
#endif
/* includes ------------------------------------------------------------------*/
#include "at32f415.h"
/* private includes ----------------------------------------------------------*/
/* add user code begin private includes */
/* add user code end private includes */
/* exported types ------------------------------------------------------------*/
/* add user code begin exported types */
/* add user code end exported types */
/* exported constants --------------------------------------------------------*/
/* add user code begin exported constants */
/* add user code end exported constants */
/* exported macro ------------------------------------------------------------*/
/* add user code begin exported macro */
/* add user code end exported macro */
/* exported functions ------------------------------------------------------- */
void NMI_Handler(void);
void HardFault_Handler(void);
void MemManage_Handler(void);
void BusFault_Handler(void);
void UsageFault_Handler(void);
void SVC_Handler(void);
void DebugMon_Handler(void);
void PendSV_Handler(void);
void TMR4_GLOBAL_IRQHandler(void);
/* add user code begin exported functions */
/* add user code end exported functions */
#ifdef __cplusplus
}
#endif
#endif

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@@ -0,0 +1,97 @@
/* add user code begin Header */
/**
**************************************************************************
* @file at32f415_wk_config.h
* @brief header file of work bench config
**************************************************************************
* Copyright notice & Disclaimer
*
* The software Board Support Package (BSP) that is made available to
* download from Artery official website is the copyrighted work of Artery.
* Artery authorizes customers to use, copy, and distribute the BSP
* software and its related documentation for the purpose of design and
* development in conjunction with Artery microcontrollers. Use of the
* software is governed by this copyright notice and the following disclaimer.
*
* THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES,
* GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS,
* TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR
* STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS,
* INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.
*
**************************************************************************
*/
/* add user code end Header */
/* define to prevent recursive inclusion -----------------------------------*/
#ifndef __AT32F415_WK_CONFIG_H
#define __AT32F415_WK_CONFIG_H
#ifdef __cplusplus
extern "C" {
#endif
/* includes -----------------------------------------------------------------------*/
#include "at32f415.h"
/* private includes -------------------------------------------------------------*/
/* add user code begin private includes */
/* add user code end private includes */
/* exported types -------------------------------------------------------------*/
/* add user code begin exported types */
/* add user code end exported types */
/* exported constants --------------------------------------------------------*/
/* add user code begin exported constants */
/* add user code end exported constants */
/* exported macro ------------------------------------------------------------*/
/* add user code begin exported macro */
/* add user code end exported macro */
/* exported functions ------------------------------------------------------- */
/* system clock config. */
void wk_system_clock_config(void);
/* config periph clock. */
void wk_periph_clock_config(void);
/* init debug function. */
void wk_debug_config(void);
/* nvic config. */
void wk_nvic_config(void);
/* init gpio function. */
void wk_gpio_config(void);
/* init i2c1 function. */
void wk_i2c1_init(void);
/* init can1 function. */
void wk_can1_init(void);
/* init usart2 function. */
void wk_usart2_init(void);
/* init tmr4 function. */
void wk_tmr4_init(void);
/* init tmr10 function. */
void wk_tmr10_init(void);
/* add user code begin exported functions */
/* add user code end exported functions */
#ifdef __cplusplus
}
#endif
#endif

224
project/src/at32f415_int.c Normal file
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@@ -0,0 +1,224 @@
/* add user code begin Header */
/**
**************************************************************************
* @file at32f415_int.c
* @brief main interrupt service routines.
**************************************************************************
* Copyright notice & Disclaimer
*
* The software Board Support Package (BSP) that is made available to
* download from Artery official website is the copyrighted work of Artery.
* Artery authorizes customers to use, copy, and distribute the BSP
* software and its related documentation for the purpose of design and
* development in conjunction with Artery microcontrollers. Use of the
* software is governed by this copyright notice and the following disclaimer.
*
* THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES,
* GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS,
* TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR
* STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS,
* INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.
*
**************************************************************************
*/
/* add user code end Header */
/* includes ------------------------------------------------------------------*/
#include "at32f415_int.h"
/* private includes ----------------------------------------------------------*/
/* add user code begin private includes */
/* add user code end private includes */
/* private typedef -----------------------------------------------------------*/
/* add user code begin private typedef */
/* add user code end private typedef */
/* private define ------------------------------------------------------------*/
/* add user code begin private define */
/* add user code end private define */
/* private macro -------------------------------------------------------------*/
/* add user code begin private macro */
/* add user code end private macro */
/* private variables ---------------------------------------------------------*/
/* add user code begin private variables */
/* add user code end private variables */
/* private function prototypes --------------------------------------------*/
/* add user code begin function prototypes */
/* add user code end function prototypes */
/* private user code ---------------------------------------------------------*/
/* add user code begin 0 */
/* add user code end 0 */
/* external variables ---------------------------------------------------------*/
/* add user code begin external variables */
/* add user code end external variables */
/**
* @brief this function handles nmi exception.
* @param none
* @retval none
*/
void NMI_Handler(void)
{
/* add user code begin NonMaskableInt_IRQ 0 */
/* add user code end NonMaskableInt_IRQ 0 */
/* add user code begin NonMaskableInt_IRQ 1 */
/* add user code end NonMaskableInt_IRQ 1 */
}
/**
* @brief this function handles hard fault exception.
* @param none
* @retval none
*/
void HardFault_Handler(void)
{
/* add user code begin HardFault_IRQ 0 */
/* add user code end HardFault_IRQ 0 */
/* go to infinite loop when hard fault exception occurs */
while (1)
{
/* add user code begin W1_HardFault_IRQ 0 */
/* add user code end W1_HardFault_IRQ 0 */
}
}
/**
* @brief this function handles memory manage exception.
* @param none
* @retval none
*/
void MemManage_Handler(void)
{
/* add user code begin MemoryManagement_IRQ 0 */
/* add user code end MemoryManagement_IRQ 0 */
/* go to infinite loop when memory manage exception occurs */
while (1)
{
/* add user code begin W1_MemoryManagement_IRQ 0 */
/* add user code end W1_MemoryManagement_IRQ 0 */
}
}
/**
* @brief this function handles bus fault exception.
* @param none
* @retval none
*/
void BusFault_Handler(void)
{
/* add user code begin BusFault_IRQ 0 */
/* add user code end BusFault_IRQ 0 */
/* go to infinite loop when bus fault exception occurs */
while (1)
{
/* add user code begin W1_BusFault_IRQ 0 */
/* add user code end W1_BusFault_IRQ 0 */
}
}
/**
* @brief this function handles usage fault exception.
* @param none
* @retval none
*/
void UsageFault_Handler(void)
{
/* add user code begin UsageFault_IRQ 0 */
/* add user code end UsageFault_IRQ 0 */
/* go to infinite loop when usage fault exception occurs */
while (1)
{
/* add user code begin W1_UsageFault_IRQ 0 */
/* add user code end W1_UsageFault_IRQ 0 */
}
}
/**
* @brief this function handles svcall exception.
* @param none
* @retval none
*/
void SVC_Handler(void)
{
/* add user code begin SVCall_IRQ 0 */
/* add user code end SVCall_IRQ 0 */
/* add user code begin SVCall_IRQ 1 */
/* add user code end SVCall_IRQ 1 */
}
/**
* @brief this function handles debug monitor exception.
* @param none
* @retval none
*/
void DebugMon_Handler(void)
{
/* add user code begin DebugMonitor_IRQ 0 */
/* add user code end DebugMonitor_IRQ 0 */
/* add user code begin DebugMonitor_IRQ 1 */
/* add user code end DebugMonitor_IRQ 1 */
}
/**
* @brief this function handles pendsv_handler exception.
* @param none
* @retval none
*/
void PendSV_Handler(void)
{
/* add user code begin PendSV_IRQ 0 */
/* add user code end PendSV_IRQ 0 */
/* add user code begin PendSV_IRQ 1 */
/* add user code end PendSV_IRQ 1 */
}
/**
* @brief this function handles TMR4 handler.
* @param none
* @retval none
*/
void TMR4_GLOBAL_IRQHandler(void)
{
/* add user code begin TMR4_GLOBAL_IRQ 0 */
/* add user code end TMR4_GLOBAL_IRQ 0 */
/* add user code begin TMR4_GLOBAL_IRQ 1 */
/* add user code end TMR4_GLOBAL_IRQ 1 */
}
/* add user code begin 1 */
/* add user code end 1 */

View File

@@ -0,0 +1,501 @@
/* add user code begin Header */
/**
**************************************************************************
* @file at32f415_wk_config.c
* @brief work bench config program
**************************************************************************
* Copyright notice & Disclaimer
*
* The software Board Support Package (BSP) that is made available to
* download from Artery official website is the copyrighted work of Artery.
* Artery authorizes customers to use, copy, and distribute the BSP
* software and its related documentation for the purpose of design and
* development in conjunction with Artery microcontrollers. Use of the
* software is governed by this copyright notice and the following disclaimer.
*
* THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES,
* GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS,
* TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR
* STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS,
* INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.
*
**************************************************************************
*/
/* add user code end Header */
#include "at32f415_wk_config.h"
/* private includes ----------------------------------------------------------*/
/* add user code begin private includes */
/* add user code end private includes */
/* private typedef -----------------------------------------------------------*/
/* add user code begin private typedef */
/* add user code end private typedef */
/* private define ------------------------------------------------------------*/
/* add user code begin private define */
/* add user code end private define */
/* private macro -------------------------------------------------------------*/
/* add user code begin private macro */
/* add user code end private macro */
/* private variables ---------------------------------------------------------*/
/* add user code begin private variables */
/* add user code end private variables */
/* private function prototypes --------------------------------------------*/
/* add user code begin function prototypes */
/* add user code end function prototypes */
/* private user code ---------------------------------------------------------*/
/* add user code begin 0 */
/* add user code end 0 */
/**
* @brief system clock config program
* @note the system clock is configured as follow:
* system clock (sclk) = hick / 12 * pll_mult
* system clock source = HICK_VALUE
* - sclk = 144000000
* - ahbdiv = 1
* - ahbclk = 144000000
* - apb1div = 2
* - apb1clk = 72000000
* - apb2div = 2
* - apb2clk = 72000000
* - pll_mult = 36
* - flash_wtcyc = 4 cycle
* @param none
* @retval none
*/
void wk_system_clock_config(void)
{
/* reset crm */
crm_reset();
/* config flash psr register */
flash_psr_set(FLASH_WAIT_CYCLE_4);
/* enable lick */
crm_clock_source_enable(CRM_CLOCK_SOURCE_LICK, TRUE);
/* wait till lick is ready */
while(crm_flag_get(CRM_LICK_STABLE_FLAG) != SET)
{
}
/* enable hick */
crm_clock_source_enable(CRM_CLOCK_SOURCE_HICK, TRUE);
/* wait till hick is ready */
while(crm_flag_get(CRM_HICK_STABLE_FLAG) != SET)
{
}
/* config pll clock resource */
crm_pll_config(CRM_PLL_SOURCE_HICK, CRM_PLL_MULT_36);
/* enable pll */
crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
/* wait till pll is ready */
while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
{
}
/* config ahbclk */
crm_ahb_div_set(CRM_AHB_DIV_1);
/* config apb2clk, the maximum frequency of APB2 clock is 75 MHz */
crm_apb2_div_set(CRM_APB2_DIV_2);
/* config apb1clk, the maximum frequency of APB1 clock is 75 MHz */
crm_apb1_div_set(CRM_APB1_DIV_2);
/* enable auto step mode */
crm_auto_step_mode_enable(TRUE);
/* select pll as system clock source */
crm_sysclk_switch(CRM_SCLK_PLL);
/* wait till pll is used as system clock source */
while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
{
}
/* disable auto step mode */
crm_auto_step_mode_enable(FALSE);
/* update system_core_clock global variable */
system_core_clock_update();
}
/**
* @brief config periph clock
* @param none
* @retval none
*/
void wk_periph_clock_config(void)
{
/* enable iomux periph clock */
crm_periph_clock_enable(CRM_IOMUX_PERIPH_CLOCK, TRUE);
/* enable gpioa periph clock */
crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE);
/* enable gpiob periph clock */
crm_periph_clock_enable(CRM_GPIOB_PERIPH_CLOCK, TRUE);
/* enable tmr10 periph clock */
crm_periph_clock_enable(CRM_TMR10_PERIPH_CLOCK, TRUE);
/* enable tmr4 periph clock */
crm_periph_clock_enable(CRM_TMR4_PERIPH_CLOCK, TRUE);
/* enable usart2 periph clock */
crm_periph_clock_enable(CRM_USART2_PERIPH_CLOCK, TRUE);
/* enable i2c1 periph clock */
crm_periph_clock_enable(CRM_I2C1_PERIPH_CLOCK, TRUE);
/* enable can1 periph clock */
crm_periph_clock_enable(CRM_CAN1_PERIPH_CLOCK, TRUE);
}
/**
* @brief init debug function.
* @param none
* @retval none
*/
void wk_debug_config(void)
{
/* jtag-dp disabled and sw-dp enabled */
gpio_pin_remap_config(SWJTAG_GMUX_010, TRUE);
}
/**
* @brief nvic config
* @param none
* @retval none
*/
void wk_nvic_config(void)
{
nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
nvic_irq_enable(TMR4_GLOBAL_IRQn, 0, 0);
}
/**
* @brief init gpio_input/gpio_output/gpio_analog/eventout function.
* @param none
* @retval none
*/
void wk_gpio_config(void)
{
/* add user code begin gpio_config 0 */
/* add user code end gpio_config 0 */
gpio_init_type gpio_init_struct;
gpio_default_para_init(&gpio_init_struct);
/* add user code begin gpio_config 1 */
/* add user code end gpio_config 1 */
/* gpio output config */
gpio_bits_reset(GPIOA, GPIO_PINS_8);
gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_MODERATE;
gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
gpio_init_struct.gpio_mode = GPIO_MODE_OUTPUT;
gpio_init_struct.gpio_pins = GPIO_PINS_8;
gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
gpio_init(GPIOA, &gpio_init_struct);
/* add user code begin gpio_config 2 */
/* add user code end gpio_config 2 */
}
/**
* @brief init i2c1 function.
* @param none
* @retval none
*/
void wk_i2c1_init(void)
{
/* add user code begin i2c1_init 0 */
/* add user code end i2c1_init 0 */
gpio_init_type gpio_init_struct;
gpio_default_para_init(&gpio_init_struct);
/* add user code begin i2c1_init 1 */
/* add user code end i2c1_init 1 */
/* configure the SCL pin */
gpio_init_struct.gpio_out_type = GPIO_OUTPUT_OPEN_DRAIN;
gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_MODERATE;
gpio_init_struct.gpio_pins = GPIO_PINS_6;
gpio_init(GPIOB, &gpio_init_struct);
/* configure the SDA pin */
gpio_init_struct.gpio_out_type = GPIO_OUTPUT_OPEN_DRAIN;
gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_MODERATE;
gpio_init_struct.gpio_pins = GPIO_PINS_7;
gpio_init(GPIOB, &gpio_init_struct);
i2c_init(I2C1, I2C_FSMODE_DUTY_2_1, 100000);
i2c_own_address1_set(I2C1, I2C_ADDRESS_MODE_7BIT, 0x0);
i2c_ack_enable(I2C1, TRUE);
i2c_clock_stretch_enable(I2C1, TRUE);
i2c_general_call_enable(I2C1, FALSE);
i2c_enable(I2C1, TRUE);
/* add user code begin i2c1_init 2 */
/* add user code end i2c1_init 2 */
}
/**
* @brief init usart2 function
* @param none
* @retval none
*/
void wk_usart2_init(void)
{
/* add user code begin usart2_init 0 */
/* add user code end usart2_init 0 */
gpio_init_type gpio_init_struct;
gpio_default_para_init(&gpio_init_struct);
/* add user code begin usart2_init 1 */
/* add user code end usart2_init 1 */
/* configure the TX pin */
gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_MODERATE;
gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
gpio_init_struct.gpio_pins = GPIO_PINS_2;
gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
gpio_init(GPIOA, &gpio_init_struct);
/* configure the RX pin */
gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_MODERATE;
gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
gpio_init_struct.gpio_mode = GPIO_MODE_INPUT;
gpio_init_struct.gpio_pins = GPIO_PINS_3;
gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
gpio_init(GPIOA, &gpio_init_struct);
/* configure param */
usart_init(USART2, 115200, USART_DATA_8BITS, USART_STOP_1_BIT);
usart_transmitter_enable(USART2, TRUE);
usart_receiver_enable(USART2, TRUE);
usart_parity_selection_config(USART2, USART_PARITY_NONE);
usart_hardware_flow_control_set(USART2, USART_HARDWARE_FLOW_NONE);
usart_enable(USART2, TRUE);
/* add user code begin usart2_init 2 */
/* add user code end usart2_init 2 */
}
/**
* @brief init tmr4 function.
* @param none
* @retval none
*/
void wk_tmr4_init(void)
{
/* add user code begin tmr4_init 0 */
/* add user code end tmr4_init 0 */
/* add user code begin tmr4_init 1 */
/* add user code end tmr4_init 1 */
/* configure counter settings */
tmr_base_init(TMR4, 1439, 999);
tmr_cnt_dir_set(TMR4, TMR_COUNT_UP);
tmr_clock_source_div_set(TMR4, TMR_CLOCK_DIV1);
tmr_period_buffer_enable(TMR4, FALSE);
/* configure primary mode settings */
tmr_sub_sync_mode_set(TMR4, FALSE);
tmr_primary_mode_select(TMR4, TMR_PRIMARY_SEL_RESET);
tmr_counter_enable(TMR4, TRUE);
/**
* Users need to configure TMR4 interrupt functions according to the actual application.
* 1. Call the below function to enable the corresponding TMR4 interrupt.
* --tmr_interrupt_enable(...)
* 2. Add the user's interrupt handler code into the below function in the at32f415_int.c file.
* --void TMR4_GLOBAL_IRQHandler(void)
*/
/* add user code begin tmr4_init 2 */
/* add user code end tmr4_init 2 */
}
/**
* @brief init tmr10 function.
* @param none
* @retval none
*/
void wk_tmr10_init(void)
{
/* add user code begin tmr10_init 0 */
/* add user code end tmr10_init 0 */
gpio_init_type gpio_init_struct;
tmr_output_config_type tmr_output_struct;
gpio_default_para_init(&gpio_init_struct);
/* add user code begin tmr10_init 1 */
/* add user code end tmr10_init 1 */
/* configure the CH1 pin */
gpio_init_struct.gpio_pins = GPIO_PINS_8;
gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_MODERATE;
gpio_init(GPIOB, &gpio_init_struct);
/* configure counter settings */
tmr_base_init(TMR10, 65535, 0);
tmr_cnt_dir_set(TMR10, TMR_COUNT_UP);
tmr_clock_source_div_set(TMR10, TMR_CLOCK_DIV1);
tmr_period_buffer_enable(TMR10, FALSE);
/* configure channel 1 output settings */
tmr_output_struct.oc_mode = TMR_OUTPUT_CONTROL_OFF;
tmr_output_struct.oc_output_state = TRUE;
tmr_output_struct.occ_output_state = FALSE;
tmr_output_struct.oc_polarity = TMR_OUTPUT_ACTIVE_HIGH;
tmr_output_struct.occ_polarity = TMR_OUTPUT_ACTIVE_HIGH;
tmr_output_struct.oc_idle_state = FALSE;
tmr_output_struct.occ_idle_state = FALSE;
tmr_output_channel_config(TMR10, TMR_SELECT_CHANNEL_1, &tmr_output_struct);
tmr_channel_value_set(TMR10, TMR_SELECT_CHANNEL_1, 0);
tmr_output_channel_buffer_enable(TMR10, TMR_SELECT_CHANNEL_1, FALSE);
tmr_counter_enable(TMR10, TRUE);
/* add user code begin tmr10_init 2 */
/* add user code end tmr10_init 2 */
}
/**
* @brief init can1 function.
* @param none
* @retval none
*/
void wk_can1_init(void)
{
/* add user code begin can1_init 0 */
/* add user code end can1_init 0 */
gpio_init_type gpio_init_struct;
can_base_type can_base_struct;
can_baudrate_type can_baudrate_struct;
can_filter_init_type can_filter_init_struct;
/* add user code begin can1_init 1 */
/* add user code end can1_init 1 */
/*gpio-----------------------------------------------------------------------------*/
gpio_default_para_init(&gpio_init_struct);
/* configure the CAN1 TX pin */
gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_MODERATE;
gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
gpio_init_struct.gpio_pins = GPIO_PINS_12;
gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
gpio_init(GPIOA, &gpio_init_struct);
/* configure the CAN1 RX pin */
gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
gpio_init_struct.gpio_mode = GPIO_MODE_INPUT;
gpio_init_struct.gpio_pins = GPIO_PINS_11;
gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
gpio_init(GPIOA, &gpio_init_struct);
/*can_base_init--------------------------------------------------------------------*/
can_default_para_init(&can_base_struct);
can_base_struct.mode_selection = CAN_MODE_COMMUNICATE;
can_base_struct.ttc_enable = FALSE;
can_base_struct.aebo_enable = TRUE;
can_base_struct.aed_enable = TRUE;
can_base_struct.prsf_enable = FALSE;
can_base_struct.mdrsel_selection = CAN_DISCARDING_FIRST_RECEIVED;
can_base_struct.mmssr_selection = CAN_SENDING_BY_ID;
can_base_init(CAN1, &can_base_struct);
/*can_baudrate_setting-------------------------------------------------------------*/
/*set baudrate = pclk/(baudrate_div *(1 + bts1_size + bts2_size))------------------*/
can_baudrate_struct.baudrate_div = 18; /*value: 1~0xFFF*/
can_baudrate_struct.rsaw_size = CAN_RSAW_1TQ; /*value: 1~4*/
can_baudrate_struct.bts1_size = CAN_BTS1_6TQ; /*value: 1~16*/
can_baudrate_struct.bts2_size = CAN_BTS2_1TQ; /*value: 1~8*/
can_baudrate_set(CAN1, &can_baudrate_struct);
/*can_filter_0_config--------------------------------------------------------------*/
can_filter_init_struct.filter_activate_enable = TRUE;
can_filter_init_struct.filter_number = 0;
can_filter_init_struct.filter_fifo = CAN_FILTER_FIFO0;
can_filter_init_struct.filter_bit = CAN_FILTER_16BIT;
can_filter_init_struct.filter_mode = CAN_FILTER_MODE_ID_MASK;
/*Standard identifier + Mask Mode + Data/Remote frame: id/mask 11bit --------------*/
can_filter_init_struct.filter_id_high = 0x0 << 5;
can_filter_init_struct.filter_id_low = 0x0 << 5;
can_filter_init_struct.filter_mask_high = 0x0 << 5;
can_filter_init_struct.filter_mask_low = 0x0 << 5;
can_filter_init(CAN1, &can_filter_init_struct);
/* add user code begin can1_init 2 */
/* add user code end can1_init 2 */
}
/* add user code begin 1 */
/* add user code end 1 */

116
project/src/main.c Normal file
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@@ -0,0 +1,116 @@
/* add user code begin Header */
/**
**************************************************************************
* @file main.c
* @brief main program
**************************************************************************
* Copyright notice & Disclaimer
*
* The software Board Support Package (BSP) that is made available to
* download from Artery official website is the copyrighted work of Artery.
* Artery authorizes customers to use, copy, and distribute the BSP
* software and its related documentation for the purpose of design and
* development in conjunction with Artery microcontrollers. Use of the
* software is governed by this copyright notice and the following disclaimer.
*
* THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES,
* GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS,
* TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR
* STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS,
* INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.
*
**************************************************************************
*/
/* add user code end Header */
/* Includes ------------------------------------------------------------------*/
#include "at32f415_wk_config.h"
/* private includes ----------------------------------------------------------*/
/* add user code begin private includes */
/* add user code end private includes */
/* private typedef -----------------------------------------------------------*/
/* add user code begin private typedef */
/* add user code end private typedef */
/* private define ------------------------------------------------------------*/
/* add user code begin private define */
/* add user code end private define */
/* private macro -------------------------------------------------------------*/
/* add user code begin private macro */
/* add user code end private macro */
/* private variables ---------------------------------------------------------*/
/* add user code begin private variables */
/* add user code end private variables */
/* private function prototypes --------------------------------------------*/
/* add user code begin function prototypes */
/* add user code end function prototypes */
/* private user code ---------------------------------------------------------*/
/* add user code begin 0 */
/* add user code end 0 */
/**
* @brief main function.
* @param none
* @retval none
*/
int main(void)
{
/* add user code begin 1 */
/* add user code end 1 */
/* system clock config. */
wk_system_clock_config();
/* config periph clock. */
wk_periph_clock_config();
/* init debug function. */
wk_debug_config();
/* nvic config. */
wk_nvic_config();
/* init usart2 function. */
wk_usart2_init();
/* init i2c1 function. */
wk_i2c1_init();
/* init tmr4 function. */
wk_tmr4_init();
/* init tmr10 function. */
wk_tmr10_init();
/* init can1 function. */
wk_can1_init();
/* init gpio function. */
wk_gpio_config();
/* add user code begin 2 */
/* add user code end 2 */
while(1)
{
/* add user code begin 3 */
/* add user code end 3 */
}
}