btl143/BC3D-firmware
4
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

feat: 增加步进电机绝对和相对位置设置函数

Browse Source
This commit is contained in:
bmy
2024-05-01 01:51:36 +08:00
parent 13d9324385
commit 7ef6f87c84
11 changed files with 321 additions and 93 deletions
Download Patch File Download Diff File Expand all files Collapse all files

1
project/inc/at32f413_int.h
View File

@@ -65,6 +65,7 @@ void SVC_Handler(void);
void DebugMon_Handler(void);
void PendSV_Handler(void);
void TMR4_GLOBAL_IRQHandler(void);
/* add user code begin exported functions */
/* add user code end exported functions */

65
project/inc/at32f413_wk_config.h
View File

@@ -55,6 +55,65 @@ extern "C" {
/* add user code end exported macro */
/* add user code begin dma define */
/* user can only modify the dma define value */
//#define DMA1_CHANNEL1_BUFFER_SIZE 0
//#define DMA1_CHANNEL1_MEMORY_BASE_ADDR 0
//#define DMA1_CHANNEL1_PERIPHERAL_BASE_ADDR 0
//#define DMA1_CHANNEL2_BUFFER_SIZE 0
//#define DMA1_CHANNEL2_MEMORY_BASE_ADDR 0
//#define DMA1_CHANNEL2_PERIPHERAL_BASE_ADDR 0
//#define DMA1_CHANNEL3_BUFFER_SIZE 0
//#define DMA1_CHANNEL3_MEMORY_BASE_ADDR 0
//#define DMA1_CHANNEL3_PERIPHERAL_BASE_ADDR 0
//#define DMA1_CHANNEL4_BUFFER_SIZE 0
//#define DMA1_CHANNEL4_MEMORY_BASE_ADDR 0
//#define DMA1_CHANNEL4_PERIPHERAL_BASE_ADDR 0
//#define DMA1_CHANNEL5_BUFFER_SIZE 0
//#define DMA1_CHANNEL5_MEMORY_BASE_ADDR 0
//#define DMA1_CHANNEL5_PERIPHERAL_BASE_ADDR 0
//#define DMA1_CHANNEL6_BUFFER_SIZE 0
//#define DMA1_CHANNEL6_MEMORY_BASE_ADDR 0
//#define DMA1_CHANNEL6_PERIPHERAL_BASE_ADDR 0
//#define DMA1_CHANNEL7_BUFFER_SIZE 0
//#define DMA1_CHANNEL7_MEMORY_BASE_ADDR 0
//#define DMA1_CHANNEL7_PERIPHERAL_BASE_ADDR 0
//#define DMA2_CHANNEL1_BUFFER_SIZE 0
//#define DMA2_CHANNEL1_MEMORY_BASE_ADDR 0
//#define DMA2_CHANNEL1_PERIPHERAL_BASE_ADDR 0
//#define DMA2_CHANNEL2_BUFFER_SIZE 0
//#define DMA2_CHANNEL2_MEMORY_BASE_ADDR 0
//#define DMA2_CHANNEL2_PERIPHERAL_BASE_ADDR 0
//#define DMA2_CHANNEL3_BUFFER_SIZE 0
//#define DMA2_CHANNEL3_MEMORY_BASE_ADDR 0
//#define DMA2_CHANNEL3_PERIPHERAL_BASE_ADDR 0
//#define DMA2_CHANNEL4_BUFFER_SIZE 0
//#define DMA2_CHANNEL4_MEMORY_BASE_ADDR 0
//#define DMA2_CHANNEL4_PERIPHERAL_BASE_ADDR 0
//#define DMA2_CHANNEL5_BUFFER_SIZE 0
//#define DMA2_CHANNEL5_MEMORY_BASE_ADDR 0
//#define DMA2_CHANNEL5_PERIPHERAL_BASE_ADDR 0
//#define DMA2_CHANNEL6_BUFFER_SIZE 0
//#define DMA2_CHANNEL6_MEMORY_BASE_ADDR 0
//#define DMA2_CHANNEL6_PERIPHERAL_BASE_ADDR 0
//#define DMA2_CHANNEL7_BUFFER_SIZE 0
//#define DMA2_CHANNEL7_MEMORY_BASE_ADDR 0
//#define DMA2_CHANNEL7_PERIPHERAL_BASE_ADDR 0
/* add user code end dma define */
/* Private defines -------------------------------------------------------------*/
#define MODE2_PIN GPIO_PINS_12
#define MODE2_GPIO_PORT GPIOB
@@ -94,12 +153,12 @@ extern "C" {
/* init usart2 function. */
void wk_usart2_init(void);
/* init tmr1 function. */
void wk_tmr1_init(void);
/* init tmr3 function. */
void wk_tmr3_init(void);
/* init tmr4 function. */
void wk_tmr4_init(void);
/* init tmr10 function. */
void wk_tmr10_init(void);