feat: 增加步进电机绝对和相对位置设置函数

This commit is contained in:
bmy
2024-05-01 01:51:36 +08:00
parent 13d9324385
commit 7ef6f87c84
11 changed files with 321 additions and 93 deletions

View File

@@ -65,6 +65,7 @@ void SVC_Handler(void);
void DebugMon_Handler(void);
void PendSV_Handler(void);
void TMR4_GLOBAL_IRQHandler(void);
/* add user code begin exported functions */
/* add user code end exported functions */

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@@ -55,6 +55,65 @@ extern "C" {
/* add user code end exported macro */
/* add user code begin dma define */
/* user can only modify the dma define value */
//#define DMA1_CHANNEL1_BUFFER_SIZE 0
//#define DMA1_CHANNEL1_MEMORY_BASE_ADDR 0
//#define DMA1_CHANNEL1_PERIPHERAL_BASE_ADDR 0
//#define DMA1_CHANNEL2_BUFFER_SIZE 0
//#define DMA1_CHANNEL2_MEMORY_BASE_ADDR 0
//#define DMA1_CHANNEL2_PERIPHERAL_BASE_ADDR 0
//#define DMA1_CHANNEL3_BUFFER_SIZE 0
//#define DMA1_CHANNEL3_MEMORY_BASE_ADDR 0
//#define DMA1_CHANNEL3_PERIPHERAL_BASE_ADDR 0
//#define DMA1_CHANNEL4_BUFFER_SIZE 0
//#define DMA1_CHANNEL4_MEMORY_BASE_ADDR 0
//#define DMA1_CHANNEL4_PERIPHERAL_BASE_ADDR 0
//#define DMA1_CHANNEL5_BUFFER_SIZE 0
//#define DMA1_CHANNEL5_MEMORY_BASE_ADDR 0
//#define DMA1_CHANNEL5_PERIPHERAL_BASE_ADDR 0
//#define DMA1_CHANNEL6_BUFFER_SIZE 0
//#define DMA1_CHANNEL6_MEMORY_BASE_ADDR 0
//#define DMA1_CHANNEL6_PERIPHERAL_BASE_ADDR 0
//#define DMA1_CHANNEL7_BUFFER_SIZE 0
//#define DMA1_CHANNEL7_MEMORY_BASE_ADDR 0
//#define DMA1_CHANNEL7_PERIPHERAL_BASE_ADDR 0
//#define DMA2_CHANNEL1_BUFFER_SIZE 0
//#define DMA2_CHANNEL1_MEMORY_BASE_ADDR 0
//#define DMA2_CHANNEL1_PERIPHERAL_BASE_ADDR 0
//#define DMA2_CHANNEL2_BUFFER_SIZE 0
//#define DMA2_CHANNEL2_MEMORY_BASE_ADDR 0
//#define DMA2_CHANNEL2_PERIPHERAL_BASE_ADDR 0
//#define DMA2_CHANNEL3_BUFFER_SIZE 0
//#define DMA2_CHANNEL3_MEMORY_BASE_ADDR 0
//#define DMA2_CHANNEL3_PERIPHERAL_BASE_ADDR 0
//#define DMA2_CHANNEL4_BUFFER_SIZE 0
//#define DMA2_CHANNEL4_MEMORY_BASE_ADDR 0
//#define DMA2_CHANNEL4_PERIPHERAL_BASE_ADDR 0
//#define DMA2_CHANNEL5_BUFFER_SIZE 0
//#define DMA2_CHANNEL5_MEMORY_BASE_ADDR 0
//#define DMA2_CHANNEL5_PERIPHERAL_BASE_ADDR 0
//#define DMA2_CHANNEL6_BUFFER_SIZE 0
//#define DMA2_CHANNEL6_MEMORY_BASE_ADDR 0
//#define DMA2_CHANNEL6_PERIPHERAL_BASE_ADDR 0
//#define DMA2_CHANNEL7_BUFFER_SIZE 0
//#define DMA2_CHANNEL7_MEMORY_BASE_ADDR 0
//#define DMA2_CHANNEL7_PERIPHERAL_BASE_ADDR 0
/* add user code end dma define */
/* Private defines -------------------------------------------------------------*/
#define MODE2_PIN GPIO_PINS_12
#define MODE2_GPIO_PORT GPIOB
@@ -94,12 +153,12 @@ extern "C" {
/* init usart2 function. */
void wk_usart2_init(void);
/* init tmr1 function. */
void wk_tmr1_init(void);
/* init tmr3 function. */
void wk_tmr3_init(void);
/* init tmr4 function. */
void wk_tmr4_init(void);
/* init tmr10 function. */
void wk_tmr10_init(void);

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@@ -29,7 +29,8 @@
/* private includes ----------------------------------------------------------*/
/* add user code begin private includes */
#include "by_debug.h"
#include "by_stepper.h"
/* add user code end private includes */
/* private typedef -----------------------------------------------------------*/
@@ -204,6 +205,25 @@ void PendSV_Handler(void)
/* add user code end PendSV_IRQ 1 */
}
/**
* @brief this function handles TMR4 handler.
* @param none
* @retval none
*/
void TMR4_GLOBAL_IRQHandler(void)
{
/* add user code begin TMR4_GLOBAL_IRQ 0 */
if(SET == tmr_interrupt_flag_get(TMR4, TMR_OVF_FLAG)){
by_stpepper_int();
tmr_flag_clear(TMR4, TMR_OVF_FLAG);
}
/* add user code end TMR4_GLOBAL_IRQ 0 */
/* add user code begin TMR4_GLOBAL_IRQ 1 */
/* add user code end TMR4_GLOBAL_IRQ 1 */
}
/* add user code begin 1 */
/* add user code end 1 */

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@@ -165,15 +165,15 @@ void wk_periph_clock_config(void)
/* enable gpiod periph clock */
crm_periph_clock_enable(CRM_GPIOD_PERIPH_CLOCK, TRUE);
/* enable tmr1 periph clock */
crm_periph_clock_enable(CRM_TMR1_PERIPH_CLOCK, TRUE);
/* enable tmr10 periph clock */
crm_periph_clock_enable(CRM_TMR10_PERIPH_CLOCK, TRUE);
/* enable tmr3 periph clock */
crm_periph_clock_enable(CRM_TMR3_PERIPH_CLOCK, TRUE);
/* enable tmr4 periph clock */
crm_periph_clock_enable(CRM_TMR4_PERIPH_CLOCK, TRUE);
/* enable usart2 periph clock */
crm_periph_clock_enable(CRM_USART2_PERIPH_CLOCK, TRUE);
@@ -200,6 +200,8 @@ void wk_debug_config(void)
void wk_nvic_config(void)
{
nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
nvic_irq_enable(TMR4_GLOBAL_IRQn, 0, 0);
}
/**
@@ -284,7 +286,7 @@ void wk_exint_config(void)
exint_init(&exint_init_struct);
/* add user code begin exint_config 2 */
exint_interrupt_enable(EXINT_LINE_5, TRUE);
/* add user code end exint_config 2 */
}
@@ -337,40 +339,6 @@ void wk_usart2_init(void)
/* add user code end usart2_init 2 */
}
/**
* @brief init tmr1 function.
* @param none
* @retval none
*/
void wk_tmr1_init(void)
{
/* add user code begin tmr1_init 0 */
/* add user code end tmr1_init 0 */
/* add user code begin tmr1_init 1 */
/* add user code end tmr1_init 1 */
/* configure counter settings */
tmr_base_init(TMR1, 65535, 0);
tmr_cnt_dir_set(TMR1, TMR_COUNT_UP);
tmr_clock_source_div_set(TMR1, TMR_CLOCK_DIV1);
tmr_repetition_counter_set(TMR1, 0);
tmr_period_buffer_enable(TMR1, FALSE);
/* configure primary mode settings */
tmr_sub_sync_mode_set(TMR1, FALSE);
tmr_primary_mode_select(TMR1, TMR_PRIMARY_SEL_RESET);
tmr_counter_enable(TMR1, TRUE);
/* add user code begin tmr1_init 2 */
/* add user code end tmr1_init 2 */
}
/**
* @brief init tmr3 function.
* @param none
@@ -439,6 +407,47 @@ void wk_tmr3_init(void)
/* add user code end tmr3_init 2 */
}
/**
* @brief init tmr4 function.
* @param none
* @retval none
*/
void wk_tmr4_init(void)
{
/* add user code begin tmr4_init 0 */
/* add user code end tmr4_init 0 */
/* add user code begin tmr4_init 1 */
/* add user code end tmr4_init 1 */
/* configure counter settings */
tmr_base_init(TMR4, 9999, 1999);
tmr_cnt_dir_set(TMR4, TMR_COUNT_UP);
tmr_clock_source_div_set(TMR4, TMR_CLOCK_DIV1);
tmr_period_buffer_enable(TMR4, FALSE);
/* configure primary mode settings */
tmr_sub_sync_mode_set(TMR4, FALSE);
tmr_primary_mode_select(TMR4, TMR_PRIMARY_SEL_RESET);
tmr_counter_enable(TMR4, TRUE);
/**
* Users need to configure TMR4 interrupt functions according to the actual application.
* 1. Call the below function to enable the corresponding TMR4 interrupt.
* --tmr_interrupt_enable(...)
* 2. Add the user's interrupt handler code into the below function in the at32f413_int.c file.
* --void TMR4_GLOBAL_IRQHandler(void)
*/
/* add user code begin tmr4_init 2 */
tmr_interrupt_enable(TMR4, TMR_OVF_INT, TRUE);
/* add user code end tmr4_init 2 */
}
/**
* @brief init tmr10 function.
* @param none

View File

@@ -33,6 +33,7 @@
#include "by_debug.h"
#include "by_can.h"
#include "by_stepper.h"
/* add user code end private includes */
/* private typedef -----------------------------------------------------------*/
@@ -66,15 +67,15 @@
/* add user code end 0 */
/**
* @brief main function.
* @param none
* @retval none
*/
* @brief main function.
* @param none
* @retval none
*/
int main(void)
{
/* add user code begin 1 */
by_debug_init();
/* add user code end 1 */
by_debug_init();
/* add user code end 1 */
/* system clock config. */
wk_system_clock_config();
@@ -94,12 +95,12 @@ int main(void)
/* init exint function. */
wk_exint_config();
/* init tmr1 function. */
wk_tmr1_init();
/* init tmr3 function. */
wk_tmr3_init();
/* init tmr4 function. */
wk_tmr4_init();
/* init tmr10 function. */
wk_tmr10_init();
@@ -110,22 +111,14 @@ int main(void)
wk_gpio_config();
/* add user code begin 2 */
DWT_Init();
DWT_Init();
by_stepper_init();
LOGD("hello world");
/* add user code end 2 */
gpio_bits_write(GPIOB, GPIO_PINS_12, FALSE); // MODE2
gpio_bits_write(GPIOB, GPIO_PINS_13, TRUE); // MODE1
gpio_bits_write(GPIOB, GPIO_PINS_14, TRUE); // MODE0
gpio_bits_write(GPIOA, GPIO_PINS_9, FALSE); // EN
gpio_bits_write(GPIOA, GPIO_PINS_8, TRUE); // DIR
gpio_bits_write(GPIOB, GPIO_PINS_15, TRUE); // CLK
/* add user code end 2 */
while(1)
{
while (1) {
/* add user code begin 3 */
DWT_Delay(40);
/* add user code end 3 */
by_stepper_loop();
/* add user code end 3 */
}
}